From e1e70dd927f5d99cd96cea17fb7fa9f193585e12 Mon Sep 17 00:00:00 2001
From: Sebastian Sumpf <sebastian.sumpf@genode-labs.com>
Date: Tue, 27 Sep 2022 14:37:01 +0200
Subject: [PATCH] platform_drv: fix Intel graphics PCI infos

GMCH is at offset 50 on Gen8+.

Ref genodelabs/genode#4578
---
 repos/os/src/drivers/platform/pci_intel_graphics.h | 5 +----
 1 file changed, 1 insertion(+), 4 deletions(-)

diff --git a/repos/os/src/drivers/platform/pci_intel_graphics.h b/repos/os/src/drivers/platform/pci_intel_graphics.h
index 630f5ecd43..fffabac758 100644
--- a/repos/os/src/drivers/platform/pci_intel_graphics.h
+++ b/repos/os/src/drivers/platform/pci_intel_graphics.h
@@ -94,8 +94,7 @@ void Driver::pci_intel_graphics_info(Device::Pci_config cfg,
 	struct Host_bridge : Mmio
 	{
 		struct Gen_old_gmch_control : Register<0x52, 16> {};
-		struct Gen_6_7_gmch_control : Register<0x50, 16> {};
-		struct Gen_gmch_control     : Register<0x52, 16> {};
+		struct Gen_gmch_control     : Register<0x50, 16> {};
 
 		using Mmio::Mmio;
 	};
@@ -113,8 +112,6 @@ void Driver::pci_intel_graphics_info(Device::Pci_config cfg,
 
 			if (gen < 6)
 				gmch = config.read<Host_bridge::Gen_old_gmch_control>();
-			else if (gen < 8)
-				gmch = config.read<Host_bridge::Gen_6_7_gmch_control>();
 			else
 				gmch = config.read<Host_bridge::Gen_gmch_control>();