base-pistachio: coding style

This commit is contained in:
Norman Feske 2021-02-07 18:01:58 +01:00
parent 9633a0a524
commit df38140ed6
26 changed files with 725 additions and 749 deletions

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@ -14,9 +14,11 @@
/* core includes */
#include <core_log.h>
/* Pistachio includes */
namespace Pistachio {
#include <l4/kdebug.h>
}
/* base-internal includes */
#include <base/internal/pistachio.h>
void Genode::Core_log::out(char const c) { Pistachio::L4_KDB_PrintChar(c); }
void Genode::Core_log::out(char const c)
{
Pistachio::L4_KDB_PrintChar(c);
}

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@ -23,168 +23,167 @@
/* core-local includes */
#include <kip.h>
/* Pistachio includes */
namespace Pistachio {
#include <l4/types.h>
}
/* base-internal includes */
#include <base/internal/pistachio.h>
namespace Genode {
class Mapping
{
private:
union {
Pistachio::L4_MapItem_t _map_item;
Pistachio::L4_GrantItem_t _grant_item;
};
public:
/**
* Constructor
*/
Mapping(addr_t dst_addr, addr_t src_addr,
Cache_attribute, bool io_mem,
unsigned l2size,
bool rw, bool executable);
/**
* Construct invalid mapping
*/
Mapping();
addr_t _dst_addr() const { return Pistachio::L4_SndBase(_map_item); }
Pistachio::L4_Fpage_t fpage() const {
return Pistachio::L4_MapItemSndFpage(_map_item); }
Pistachio::L4_MapItem_t map_item() const { return _map_item; };
/**
* Prepare map operation
*
* On Pistachio, we need to map a page locally to be able to map it
* to another address space.
*/
void prepare_map_operation()
{
using namespace Pistachio;
unsigned char volatile *core_local_addr =
(unsigned char volatile *)L4_Address(_map_item.X.snd_fpage);
if (L4_Rights(_map_item.X.snd_fpage) & L4_Writable)
touch_read_write(core_local_addr);
else
touch_read(core_local_addr);
}
};
/**
* Special paging server class
*/
class Ipc_pager
{
private:
Pistachio::L4_ThreadId_t _last; /* origin of last fault message */
Pistachio::L4_Word_t _flags; /* page-fault attributes */
addr_t _pf_addr; /* page-fault address */
addr_t _pf_ip; /* instruction pointer of faulter */
Pistachio::L4_MapItem_t _map_item; /* page-fault answer */
protected:
/**
* Wait for short-message (register) IPC -- pagefault
*/
void _wait();
/**
* Send short flex page and
* wait for next short-message (register) IPC -- pagefault
*/
void _reply_and_wait();
public:
/**
* Wait for a new fault received as short message IPC
*/
void wait_for_fault();
/**
* Reply current fault and wait for a new one
*
* Send short flex page and wait for next short-message (register)
* IPC -- pagefault
*/
void reply_and_wait_for_fault();
/**
* Request instruction pointer of current fault
*/
addr_t fault_ip() { return _pf_ip; }
/**
* Request fault address of current page fault
*/
addr_t fault_addr() { return _pf_addr & ~3; }
/**
* Set parameters for next reply
*/
void set_reply_mapping(Mapping m) { _map_item = m.map_item(); }
/**
* Set destination for next reply
*/
void set_reply_dst(Native_capability pager_object) {
_last.raw = pager_object.local_name(); }
/**
* Answer call without sending a flex-page mapping
*
* This function is used to acknowledge local calls from one of
* core's region-manager sessions.
*/
void acknowledge_wakeup();
/**
* Returns true if the last request was send from a core thread
*/
bool request_from_core() { return true; }
/**
* Return badge for faulting thread
*
* As L4v4 has no server-defined badges for fault messages,
* we interpret the sender ID as badge.
*/
unsigned long badge() const { return _last.raw; }
/**
* Return true if last fault was a write fault
*/
bool write_fault() const { return (_flags & 2); }
/**
* Return true if last fault was a executable fault
*/
bool exec_fault() const { return false; }
/**
* Return true if last fault was an exception
*/
bool exception() const
{
/*
* Reflection of exceptions is not supported on this platform.
*/
return false;
}
};
class Mapping;
class Ipc_pager;
}
class Genode::Mapping
{
private:
union {
Pistachio::L4_MapItem_t _map_item;
Pistachio::L4_GrantItem_t _grant_item;
};
public:
/**
* Constructor
*/
Mapping(addr_t dst_addr, addr_t src_addr,
Cache_attribute, bool io_mem,
unsigned l2size,
bool rw, bool executable);
/**
* Construct invalid mapping
*/
Mapping();
addr_t _dst_addr() const { return Pistachio::L4_SndBase(_map_item); }
Pistachio::L4_Fpage_t fpage() const {
return Pistachio::L4_MapItemSndFpage(_map_item); }
Pistachio::L4_MapItem_t map_item() const { return _map_item; };
/**
* Prepare map operation
*
* On Pistachio, we need to map a page locally to be able to map it
* to another address space.
*/
void prepare_map_operation()
{
using namespace Pistachio;
unsigned char volatile *core_local_addr =
(unsigned char volatile *)L4_Address(_map_item.X.snd_fpage);
if (L4_Rights(_map_item.X.snd_fpage) & L4_Writable)
touch_read_write(core_local_addr);
else
touch_read(core_local_addr);
}
};
class Genode::Ipc_pager
{
private:
Pistachio::L4_ThreadId_t _last; /* origin of last fault message */
Pistachio::L4_Word_t _flags; /* page-fault attributes */
addr_t _pf_addr; /* page-fault address */
addr_t _pf_ip; /* instruction pointer of faulter */
Pistachio::L4_MapItem_t _map_item; /* page-fault answer */
protected:
/**
* Wait for short-message (register) IPC -- pagefault
*/
void _wait();
/**
* Send short flex page and
* wait for next short-message (register) IPC -- pagefault
*/
void _reply_and_wait();
public:
/**
* Wait for a new fault received as short message IPC
*/
void wait_for_fault();
/**
* Reply current fault and wait for a new one
*
* Send short flex page and wait for next short-message (register)
* IPC -- pagefault
*/
void reply_and_wait_for_fault();
/**
* Request instruction pointer of current fault
*/
addr_t fault_ip() { return _pf_ip; }
/**
* Request fault address of current page fault
*/
addr_t fault_addr() { return _pf_addr & ~3; }
/**
* Set parameters for next reply
*/
void set_reply_mapping(Mapping m) { _map_item = m.map_item(); }
/**
* Set destination for next reply
*/
void set_reply_dst(Native_capability pager_object) {
_last.raw = pager_object.local_name(); }
/**
* Answer call without sending a flex-page mapping
*
* This function is used to acknowledge local calls from one of
* core's region-manager sessions.
*/
void acknowledge_wakeup();
/**
* Returns true if the last request was send from a core thread
*/
bool request_from_core() { return true; }
/**
* Return badge for faulting thread
*
* As L4v4 has no server-defined badges for fault messages,
* we interpret the sender ID as badge.
*/
unsigned long badge() const { return _last.raw; }
/**
* Return true if last fault was a write fault
*/
bool write_fault() const { return (_flags & 2); }
/**
* Return true if last fault was a executable fault
*/
bool exec_fault() const { return false; }
/**
* Return true if last fault was an exception
*/
bool exception() const
{
/*
* Reflection of exceptions is not supported on this platform.
*/
return false;
}
};
#endif /* _CORE__INCLUDE__IPC_PAGER_H_ */

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@ -14,9 +14,9 @@
#ifndef _CORE__INCLUDE__KIP_H_
#define _CORE__INCLUDE__KIP_H_
#include <base/internal/pistachio.h>
namespace Pistachio {
#include <l4/types.h>
#include <l4/kip.h>
/**
* Return a pointer to the kernel info page

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@ -18,13 +18,8 @@
#include <platform.h>
#include <util.h>
/* Pistachio includes */
namespace Pistachio {
#include <l4/space.h>
#include <l4/types.h>
#include <l4/ipc.h>
#include <l4/kdebug.h>
}
/* base-internal includes */
#include <base/internal/pistachio.h>
namespace Genode {

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@ -21,149 +21,148 @@
/* base-internal includes */
#include <base/internal/capability_space.h>
/* core-local includes */
#include "synced_range_allocator.h"
#include "platform_generic.h"
#include "platform_thread.h"
#include "platform_pd.h"
/* core includes */
#include <synced_range_allocator.h>
#include <platform_generic.h>
#include <platform_thread.h>
#include <platform_pd.h>
namespace Genode { class Platform; }
namespace Genode {
class Genode::Platform : public Platform_generic
{
private:
class Platform : public Platform_generic
{
private:
/*
* Shortcut for the type of allocator instances for physical resources
*/
typedef Synced_range_allocator<Allocator_avl> Phys_allocator;
/*
* Shortcut for the type of allocator instances for physical resources
*/
typedef Synced_range_allocator<Allocator_avl> Phys_allocator;
Phys_allocator _ram_alloc; /* RAM allocator */
Phys_allocator _io_mem_alloc; /* MMIO allocator */
Phys_allocator _io_port_alloc; /* I/O port allocator */
Phys_allocator _irq_alloc; /* IRQ allocator */
Phys_allocator _region_alloc; /* virtual memory allocator for core */
Rom_fs _rom_fs { }; /* ROM file system */
Rom_module _kip_rom; /* ROM module for Fiasco KIP */
addr_t _vm_start = 0; /* begin of virtual memory */
size_t _vm_size = 0; /* size of virtual memory */
Phys_allocator _ram_alloc; /* RAM allocator */
Phys_allocator _io_mem_alloc; /* MMIO allocator */
Phys_allocator _io_port_alloc; /* I/O port allocator */
Phys_allocator _irq_alloc; /* IRQ allocator */
Phys_allocator _region_alloc; /* virtual memory allocator for core */
Rom_fs _rom_fs { }; /* ROM file system */
Rom_module _kip_rom; /* ROM module for Fiasco KIP */
addr_t _vm_start = 0; /* begin of virtual memory */
size_t _vm_size = 0; /* size of virtual memory */
/*
* We do not export any boot module loaded before FIRST_ROM.
*/
enum { FIRST_ROM = 3 };
/*
* We do not export any boot module loaded before FIRST_ROM.
*/
enum { FIRST_ROM = 3 };
/**
* Setup base resources
*
* - Map and provide KIP as ROM module
* - Initializes region allocator
*/
void _setup_basics();
/**
* Setup base resources
*
* - Map and provide KIP as ROM module
* - Initializes region allocator
*/
void _setup_basics();
/**
* Setup preemption flags
*/
void _setup_preemption();
/**
* Setup preemption flags
*/
void _setup_preemption();
/**
* Setup RAM, IO_MEM, and region allocators
*/
void _setup_mem_alloc();
/**
* Setup RAM, IO_MEM, and region allocators
*/
void _setup_mem_alloc();
/**
* Setup I/O port space allocator
*/
void _setup_io_port_alloc();
/**
* Setup I/O port space allocator
*/
void _setup_io_port_alloc();
/**
* Setup IRQ allocator
*/
void _setup_irq_alloc();
/**
* Setup IRQ allocator
*/
void _setup_irq_alloc();
/**
* Parse multi-boot information and update ROM database
*/
void _init_rom_modules();
/**
* Parse multi-boot information and update ROM database
*/
void _init_rom_modules();
addr_t _rom_module_phys(addr_t virt) { return virt; }
addr_t _rom_module_phys(addr_t virt) { return virt; }
public:
/**
* Pager object representing the pager of core namely sigma0
*/
struct Sigma0 : public Pager_object
{
/**
* Constructor
*/
Sigma0();
int pager(Ipc_pager &) override { /* never called */ return -1; }
};
/**
* Return singleton instance of Sigma0 pager object
*/
static Sigma0 &sigma0();
/**
* Core pager thread that handles core-internal page-faults
*/
struct Core_pager : public Platform_thread, public Pager_object
{
/**
* Constructor
*/
Core_pager(Platform_pd &core_pd);
int pager(Ipc_pager &) override { /* never called */ return -1; }
};
/**
* Return singleton instance of core pager object
*/
Core_pager &core_pager();
public:
/**
* Pager object representing the pager of core namely sigma0
*/
struct Sigma0 : public Pager_object
{
/**
* Constructor
*/
Platform();
Sigma0();
int pager(Ipc_pager &) override { /* never called */ return -1; }
};
/**
* Return singleton instance of Sigma0 pager object
*/
static Sigma0 &sigma0();
/**
* Core pager thread that handles core-internal page-faults
*/
struct Core_pager : public Platform_thread, public Pager_object
{
/**
* Return singleton instance of core PD object
* Constructor
*/
Platform_pd &core_pd();
Core_pager(Platform_pd &core_pd);
int pager(Ipc_pager &) override { /* never called */ return -1; }
};
/**
* Return singleton instance of core pager object
*/
Core_pager &core_pager();
/**
* Constructor
*/
Platform();
/**
* Return singleton instance of core PD object
*/
Platform_pd &core_pd();
/********************************
** Generic platform interface **
********************************/
/********************************
** Generic platform interface **
********************************/
Range_allocator &core_mem_alloc() override { return _ram_alloc; }
Range_allocator &ram_alloc() override { return _ram_alloc; }
Range_allocator &io_mem_alloc() override { return _io_mem_alloc; }
Range_allocator &io_port_alloc() override { return _io_port_alloc; }
Range_allocator &irq_alloc() override { return _irq_alloc; }
Range_allocator &region_alloc() override { return _region_alloc; }
addr_t vm_start() const override { return _vm_start; }
size_t vm_size() const override { return _vm_size; }
Rom_fs &rom_fs() override { return _rom_fs; }
size_t max_caps() const override { return Capability_space::max_caps(); }
Range_allocator &core_mem_alloc() override { return _ram_alloc; }
Range_allocator &ram_alloc() override { return _ram_alloc; }
Range_allocator &io_mem_alloc() override { return _io_mem_alloc; }
Range_allocator &io_port_alloc() override { return _io_port_alloc; }
Range_allocator &irq_alloc() override { return _irq_alloc; }
Range_allocator &region_alloc() override { return _region_alloc; }
addr_t vm_start() const override { return _vm_start; }
size_t vm_size() const override { return _vm_size; }
Rom_fs &rom_fs() override { return _rom_fs; }
size_t max_caps() const override { return Capability_space::max_caps(); }
void wait_for_exit() override;
void wait_for_exit() override;
Affinity::Space affinity_space() const override
{
/*
* Ignore topology of CPU nodes, just return a one-dimensional
* affinity space.
*/
return Affinity::Space(L4_NumProcessors(Pistachio::get_kip()), 1);
}
};
}
Affinity::Space affinity_space() const override
{
/*
* Ignore topology of CPU nodes, just return a one-dimensional
* affinity space.
*/
return Affinity::Space(L4_NumProcessors(Pistachio::get_kip()), 1);
}
};
#endif /* _CORE__INCLUDE__PLATFORM_H_ */

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@ -14,228 +14,233 @@
#ifndef _CORE__INCLUDE__PLATFORM_PD_H_
#define _CORE__INCLUDE__PLATFORM_PD_H_
/* Genode includes */
#include <base/allocator.h>
/* base-internal includes */
#include <base/internal/pistachio.h>
/* core includes */
#include <platform_thread.h>
#include <address_space.h>
namespace Pistachio {
#include <l4/types.h>
}
namespace Genode {
class Platform_thread;
class Platform_pd : public Address_space
{
private:
/*
* Noncopyable
*/
Platform_pd(Platform_pd const &);
Platform_pd &operator = (Platform_pd const &);
friend class Platform_thread;
/*
* L4 thread ID has 18 bits for thread number and 14 bits for
* version info.
*/
enum {
PD_BITS = 9,
THREAD_BITS = 7,
VERSION_BITS = 14 - 1, /* preserve 1 bit, see 'make_l4_id' */
PD_FIRST = 0,
PD_MAX = (1 << PD_BITS) - 1,
THREAD_MAX = (1 << THREAD_BITS) - 1,
VERSION_MAX = (1 << VERSION_BITS) - 1,
PD_INVALID = -1,
};
unsigned _pd_id = 0;
unsigned _version = 0;
Pistachio::L4_ThreadId_t _l4_task_id { }; /* L4 task ID */
/**
* Manually construct L4 thread ID from its components
*/
Pistachio::L4_ThreadId_t make_l4_id(unsigned pd_no,
unsigned thread_no,
unsigned version)
{
/*
* We have to make sure that the 6 lower version bits are
* never zero. Otherwise, the kernel won't recognize the
* thread ID as a global ID (i.e., 'L4_ThreadControl' would
* fail during the creation of a new PD). To maintain this
* invariant, we always set the lowest version bit to one.
*/
return Pistachio::L4_GlobalId((pd_no << PD_BITS) | thread_no,
(version << 1) | 1);
}
/**********************************************
** Threads of this protection domain object **
**********************************************/
Platform_thread *_threads[THREAD_MAX];
/**
* Initialize thread allocator
*/
void _init_threads();
/**
* Thread iteration for one PD
*/
Platform_thread *_next_thread();
/**
* Thread allocation
*
* Again a special case for Core thread0.
*/
int _alloc_thread(int thread_id, Platform_thread &thread);
/**
* Thread deallocation
*
* No special case for Core thread0 here - we just never call it.
*/
void _free_thread(int thread_id);
/******************
** PD allocator **
******************/
struct Pd_alloc
{
unsigned reserved : 1;
unsigned free : 1;
unsigned version : VERSION_BITS;
Pd_alloc(bool r, bool f, unsigned v)
: reserved(r), free(f), version(v) { }
/*
* Start with version 2 to avoid being mistaken as local or
* interrupt thread ID.
*/
Pd_alloc() : reserved(0), free(0), version(2) { }
};
static Pd_alloc *_pds()
{
static Pd_alloc static_pds[PD_MAX];
return static_pds;
}
Pistachio::L4_Word_t _kip_ptr = 0;
Pistachio::L4_Word_t _utcb_ptr = 0;
/**
* Protection-domain creation
*
* The syscall parameter propagates if any L4 kernel function
* should be used. We need the special case for the Core startup.
*/
void _create_pd(bool syscall);
/**
* Protection domain destruction
*
* No special case for Core here - we just never call it.
*/
void _destroy_pd();
/**
* Protection domain allocation
*
* Find free PD and use it. We need the special case for core
* startup.
*/
int _alloc_pd(signed pd_id);
/**
* Protection domain deallocation
*
* No special case for Core here - we just never call it.
*/
void _free_pd();
/**
* Setup KIP and UTCB area
*/
void _setup_address_space();
/**
* Return the location of the UTCB for the specified thread
*/
Pistachio::L4_Word_t _utcb_location(unsigned int thread_id);
/***************
** Debugging **
***************/
void _debug_log_pds(void);
void _debug_log_threads(void);
public:
/**
* Constructors
*/
Platform_pd(bool core);
Platform_pd(Allocator &md_alloc, char const *,
signed pd_id = PD_INVALID, bool create = true);
/**
* Destructor
*/
~Platform_pd();
/**
* Register quota donation at allocator guard
*/
void upgrade_ram_quota(size_t) { }
static Pistachio::L4_Word_t _core_utcb_ptr;
static void touch_utcb_space();
/**
* Bind thread to protection domain
*
* This function allocates the physical L4 thread ID.
*/
bool bind_thread(Platform_thread &thread);
int bind_initial_thread(Platform_thread &thread);
/**
* Unbind thread from protection domain
*
* Free the thread's slot and update thread object.
*/
void unbind_thread(Platform_thread &thread);
/**
* Assign parent interface to protection domain
*/
void assign_parent(Native_capability) { }
int pd_id() const { return _pd_id; }
/*****************************
** Address-space interface **
*****************************/
void flush(addr_t, size_t, Core_local_addr) override;
};
class Platform_pd;
}
class Genode::Platform_pd : public Address_space
{
private:
/*
* Noncopyable
*/
Platform_pd(Platform_pd const &);
Platform_pd &operator = (Platform_pd const &);
friend class Platform_thread;
/*
* L4 thread ID has 18 bits for thread number and 14 bits for
* version info.
*/
enum {
PD_BITS = 9,
THREAD_BITS = 7,
VERSION_BITS = 14 - 1, /* preserve 1 bit, see 'make_l4_id' */
PD_FIRST = 0,
PD_MAX = (1 << PD_BITS) - 1,
THREAD_MAX = (1 << THREAD_BITS) - 1,
VERSION_MAX = (1 << VERSION_BITS) - 1,
PD_INVALID = -1,
};
unsigned _pd_id = 0;
unsigned _version = 0;
Pistachio::L4_ThreadId_t _l4_task_id { }; /* L4 task ID */
/**
* Manually construct L4 thread ID from its components
*/
Pistachio::L4_ThreadId_t make_l4_id(unsigned pd_no,
unsigned thread_no,
unsigned version)
{
/*
* We have to make sure that the 6 lower version bits are
* never zero. Otherwise, the kernel won't recognize the
* thread ID as a global ID (i.e., 'L4_ThreadControl' would
* fail during the creation of a new PD). To maintain this
* invariant, we always set the lowest version bit to one.
*/
return Pistachio::L4_GlobalId((pd_no << PD_BITS) | thread_no,
(version << 1) | 1);
}
/**********************************************
** Threads of this protection domain object **
**********************************************/
Platform_thread *_threads[THREAD_MAX];
/**
* Initialize thread allocator
*/
void _init_threads();
/**
* Thread iteration for one PD
*/
Platform_thread *_next_thread();
/**
* Thread allocation
*
* Again a special case for Core thread0.
*/
int _alloc_thread(int thread_id, Platform_thread &thread);
/**
* Thread deallocation
*
* No special case for Core thread0 here - we just never call it.
*/
void _free_thread(int thread_id);
/******************
** PD allocator **
******************/
struct Pd_alloc
{
unsigned reserved : 1;
unsigned free : 1;
unsigned version : VERSION_BITS;
Pd_alloc(bool r, bool f, unsigned v)
: reserved(r), free(f), version(v) { }
/*
* Start with version 2 to avoid being mistaken as local or
* interrupt thread ID.
*/
Pd_alloc() : reserved(0), free(0), version(2) { }
};
static Pd_alloc *_pds()
{
static Pd_alloc static_pds[PD_MAX];
return static_pds;
}
Pistachio::L4_Word_t _kip_ptr = 0;
Pistachio::L4_Word_t _utcb_ptr = 0;
/**
* Protection-domain creation
*
* The syscall parameter propagates if any L4 kernel function
* should be used. We need the special case for the Core startup.
*/
void _create_pd(bool syscall);
/**
* Protection domain destruction
*
* No special case for Core here - we just never call it.
*/
void _destroy_pd();
/**
* Protection domain allocation
*
* Find free PD and use it. We need the special case for core
* startup.
*/
int _alloc_pd(signed pd_id);
/**
* Protection domain deallocation
*
* No special case for Core here - we just never call it.
*/
void _free_pd();
/**
* Setup KIP and UTCB area
*/
void _setup_address_space();
/**
* Return the location of the UTCB for the specified thread
*/
Pistachio::L4_Word_t _utcb_location(unsigned int thread_id);
/***************
** Debugging **
***************/
void _debug_log_pds(void);
void _debug_log_threads(void);
public:
/**
* Constructors
*/
Platform_pd(bool core);
Platform_pd(Allocator &md_alloc, char const *,
signed pd_id = PD_INVALID, bool create = true);
/**
* Destructor
*/
~Platform_pd();
/**
* Register quota donation at allocator guard
*/
void upgrade_ram_quota(size_t) { }
static Pistachio::L4_Word_t _core_utcb_ptr;
static void touch_utcb_space();
/**
* Bind thread to protection domain
*
* This function allocates the physical L4 thread ID.
*/
bool bind_thread(Platform_thread &thread);
int bind_initial_thread(Platform_thread &thread);
/**
* Unbind thread from protection domain
*
* Free the thread's slot and update thread object.
*/
void unbind_thread(Platform_thread &thread);
/**
* Assign parent interface to protection domain
*/
void assign_parent(Native_capability) { }
int pd_id() const { return _pd_id; }
/*****************************
** Address-space interface **
*****************************/
void flush(addr_t, size_t, Core_local_addr) override;
};
#endif /* _CORE__INCLUDE__PLATFORM_PD_H_ */

View File

@ -24,9 +24,13 @@
#include <platform_pd.h>
#include <assertion.h>
/* Pistachio includes */
namespace Pistachio {
#include <l4/types.h>
/* base-internal includes */
#include <base/internal/pistachio.h>
namespace Genode {
class Platform_pd;
class Platform_thread;
}
@ -40,165 +44,163 @@ inline unsigned long convert_native_thread_id_to_badge(Pistachio::L4_ThreadId_t
}
namespace Genode {
class Genode::Platform_thread : Interface
{
private:
class Platform_pd;
class Platform_thread : Interface
{
private:
typedef Pistachio::L4_ThreadId_t L4_ThreadId_t;
typedef Pistachio::L4_ThreadId_t L4_ThreadId_t;
/*
* Noncopyable
*/
Platform_thread(Platform_thread const &);
Platform_thread &operator = (Platform_thread const &);
/*
* Noncopyable
*/
Platform_thread(Platform_thread const &);
Platform_thread &operator = (Platform_thread const &);
typedef String<32> Name;
typedef String<32> Name;
int _thread_id = THREAD_INVALID;
L4_ThreadId_t _l4_thread_id = L4_nilthread;
Name const _name; /* thread name at kernel debugger */
Platform_pd *_platform_pd = nullptr;
unsigned _priority = 0;
Pager_object *_pager = nullptr;
Affinity::Location _location;
int _thread_id = THREAD_INVALID;
L4_ThreadId_t _l4_thread_id = L4_nilthread;
Name const _name; /* thread name at kernel debugger */
Platform_pd *_platform_pd = nullptr;
unsigned _priority = 0;
Pager_object *_pager = nullptr;
Affinity::Location _location;
public:
public:
enum { THREAD_INVALID = -1 };
enum { DEFAULT_PRIORITY = 128 };
enum { THREAD_INVALID = -1 };
enum { DEFAULT_PRIORITY = 128 };
/**
* Constructor
*/
Platform_thread(size_t, char const *name, unsigned priority,
Affinity::Location location, addr_t)
:
_name(name), _priority(priority), _location(location)
{ }
/**
* Constructor
*/
Platform_thread(size_t, char const *name, unsigned priority,
Affinity::Location location, addr_t)
:
_name(name), _priority(priority), _location(location)
{ }
/**
* Constructor used for core-internal threads
*/
Platform_thread(char const *name)
: _name(name), _location(Affinity::Location()) { }
/**
* Constructor used for core-internal threads
*/
Platform_thread(char const *name)
: _name(name), _location(Affinity::Location()) { }
/**
* Destructor
*/
~Platform_thread();
/**
* Destructor
*/
~Platform_thread();
/**
* Start thread
*
* \param ip instruction pointer to start at
* \param sp stack pointer to use
*
* \retval 0 successful
* \retval -1 thread could not be started
*/
int start(void *ip, void *sp);
/**
* Start thread
*
* \param ip instruction pointer to start at
* \param sp stack pointer to use
*
* \retval 0 successful
* \retval -1 thread could not be started
*/
int start(void *ip, void *sp);
/**
* Pause this thread
*/
void pause();
/**
* Pause this thread
*/
void pause();
/**
* Enable/disable single stepping
*/
void single_step(bool) { }
/**
* Enable/disable single stepping
*/
void single_step(bool) { }
/**
* Resume this thread
*/
void resume();
/**
* Resume this thread
*/
void resume();
/**
* This thread is about to be bound
*
* \param thread_id local thread ID
* \param l4_thread_id final L4 thread ID
* \param pd platform pd, thread is bound to
*/
void bind(int thread_id, Pistachio::L4_ThreadId_t l4_thread_id,
Platform_pd &pd);
/**
* This thread is about to be bound
*
* \param thread_id local thread ID
* \param l4_thread_id final L4 thread ID
* \param pd platform pd, thread is bound to
*/
void bind(int thread_id, Pistachio::L4_ThreadId_t l4_thread_id,
Platform_pd &pd);
/**
* Unbind this thread
*/
void unbind();
/**
* Unbind this thread
*/
void unbind();
/**
* Override thread state with 's'
*
* \throw Cpu_session::State_access_failed
*/
void state(Thread_state s);
/**
* Override thread state with 's'
*
* \throw Cpu_session::State_access_failed
*/
void state(Thread_state s);
/**
* Read thread state
*/
Thread_state state();
/**
* Read thread state
*/
Thread_state state();
/************************
** Accessor functions **
************************/
/************************
** Accessor functions **
************************/
/**
* Return/set pager
*/
Pager_object &pager() const
{
if (_pager)
return *_pager;
/**
* Return/set pager
*/
Pager_object &pager() const
{
if (_pager)
return *_pager;
ASSERT_NEVER_CALLED;
}
ASSERT_NEVER_CALLED;
}
void pager(Pager_object &pager) { _pager = &pager; }
void pager(Pager_object &pager) { _pager = &pager; }
/**
* Return identification of thread when faulting
*/
unsigned long pager_object_badge() const {
return convert_native_thread_id_to_badge(_l4_thread_id); }
/**
* Return identification of thread when faulting
*/
unsigned long pager_object_badge() const
{
return convert_native_thread_id_to_badge(_l4_thread_id);
}
/**
* Set the executing CPU for this thread
*/
void affinity(Affinity::Location location);
/**
* Set the executing CPU for this thread
*/
void affinity(Affinity::Location location);
/**
* Request the affinity of this thread
*/
Affinity::Location affinity() const;
/**
* Request the affinity of this thread
*/
Affinity::Location affinity() const;
/**
* Set CPU quota of the thread to 'quota'
*/
void quota(size_t const) { /* not supported*/ }
/**
* Set CPU quota of the thread to 'quota'
*/
void quota(size_t const) { /* not supported*/ }
/**
* Return execution time consumed by the thread
*/
Trace::Execution_time execution_time() const { return { 0, 0 }; }
/**
* Return execution time consumed by the thread
*/
Trace::Execution_time execution_time() const { return { 0, 0 }; }
/**********************************
** Pistachio-specific Accessors **
**********************************/
/**********************************
** Pistachio-specific Accessors **
**********************************/
int thread_id() const { return _thread_id; }
Pistachio::L4_ThreadId_t native_thread_id() const { return _l4_thread_id; }
Name name() const { return _name; }
int thread_id() const { return _thread_id; }
Pistachio::L4_ThreadId_t native_thread_id() const { return _l4_thread_id; }
Name name() const { return _name; }
/* use only for core... */
void set_l4_thread_id(Pistachio::L4_ThreadId_t id) { _l4_thread_id = id; }
};
}
/* use only for core... */
void set_l4_thread_id(Pistachio::L4_ThreadId_t id) { _l4_thread_id = id; }
};
#endif /* _CORE__INCLUDE__PLATFORM_THREAD_H_ */

View File

@ -16,9 +16,8 @@
#include <base/output.h>
namespace Pistachio {
#include <l4/types.h>
}
/* base-internal includes */
#include <base/internal/pistachio.h>
namespace Genode { struct Formatted_tid; }

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@ -19,6 +19,7 @@
namespace Genode { class Rpc_cap_factory; }
class Genode::Rpc_cap_factory
{
private:

View File

@ -22,18 +22,12 @@
/* base-internal includes */
#include <base/internal/page_size.h>
#include <base/internal/pistachio.h>
/* core-local includes */
#include <kip.h>
#include <print_l4_thread_id.h>
/* Pistachio includes */
namespace Pistachio {
#include <l4/types.h>
#include <l4/ipc.h>
#include <l4/kdebug.h>
}
namespace Genode {
inline void log_event(const char *) { }

View File

@ -18,12 +18,8 @@
#include <io_mem_session_component.h>
#include <kip.h>
/* Pistachio includes */
namespace Pistachio {
#include <l4/ipc.h>
#include <l4/sigma0.h>
#include <l4/misc.h>
}
/* base-internal includes */
#include <base/internal/pistachio.h>
using namespace Genode;
@ -32,7 +28,7 @@ using namespace Genode;
* TODO This should take a size parameter and check if the whole
* region is "normal" memory.
*/
bool is_conventional_memory(addr_t base)
static bool is_conventional_memory(addr_t base)
{
using namespace Pistachio;
L4_KernelInterfacePage_t *kip = get_kip();
@ -53,9 +49,11 @@ bool is_conventional_memory(addr_t base)
void Io_mem_session_component::_unmap_local(addr_t, size_t) { }
static inline bool can_use_super_page(addr_t base, size_t size) {
static inline bool can_use_super_page(addr_t base, size_t size)
{
return (base & (get_super_page_size() - 1)) == 0
&& (size >= get_super_page_size()); }
&& (size >= get_super_page_size());
}
addr_t Io_mem_session_component::_map_local(addr_t base, size_t size)

View File

@ -19,10 +19,7 @@
#include <irq_root.h>
#include <util.h>
/* Pistachio includes */
namespace Pistachio {
#include <l4/ipc.h>
}
/* base-internal includes */
using namespace Genode;
using namespace Pistachio;

View File

@ -18,19 +18,12 @@
/* base-internal includes */
#include <base/internal/native_thread.h>
#include <base/internal/capability_space_tpl.h>
#include <base/internal/pistachio.h>
/* core includes */
#include <ipc_pager.h>
#include <pager.h>
namespace Pistachio
{
#include <l4/message.h>
#include <l4/ipc.h>
#include <l4/schedule.h>
#include <l4/kdebug.h>
}
using namespace Genode;
using namespace Pistachio;
@ -56,7 +49,10 @@ Mapping::Mapping(addr_t dst_addr, addr_t src_addr,
}
Mapping::Mapping() { _map_item = L4_MapItem(L4_Nilpage, 0); }
Mapping::Mapping()
{
_map_item = L4_MapItem(L4_Nilpage, 0);
}
/***************

View File

@ -16,12 +16,7 @@
/* base-internal includes */
#include <base/internal/capability_space_tpl.h>
/* Pistachio includes */
namespace Pistachio {
#include <l4/types.h>
#include <l4/ipc.h>
}
#include <base/internal/pistachio.h>
using namespace Genode;

View File

@ -23,6 +23,7 @@
#include <base/internal/stack_area.h>
#include <base/internal/capability_space_tpl.h>
#include <base/internal/globals.h>
#include <base/internal/pistachio.h>
/* core includes */
#include <boot_modules.h>
@ -35,15 +36,6 @@
#include <kip.h>
#include <print_l4_thread_id.h>
/* Pistachio includes */
namespace Pistachio {
#include <l4/kip.h>
#include <l4/sigma0.h>
#include <l4/space.h>
#include <l4/bootinfo.h>
#include <l4/schedule.h>
}
using namespace Genode;
@ -61,6 +53,7 @@ static Synced_range_allocator<Allocator_avl> &_core_address_ranges()
return _core_address_ranges;
}
enum { PAGER_STACK_ELEMENTS = 512 };
static unsigned long _core_pager_stack[PAGER_STACK_ELEMENTS];

View File

@ -17,14 +17,8 @@
#include <util.h>
#include <platform_pd.h>
/* Pistachio includes */
namespace Pistachio {
#include <l4/thread.h>
#include <l4/sigma0.h>
#include <l4/schedule.h>
#include <l4/space.h>
#include <l4/types.h>
}
/* base-internal includes */
#include <base/internal/pistachio.h>
using namespace Pistachio;
using namespace Genode;
@ -214,7 +208,6 @@ void Platform_pd::unbind_thread(Platform_thread &thread)
thread.unbind();
_free_thread(thread_id);
}
@ -278,7 +271,7 @@ void Platform_pd::_setup_address_space()
L4_Word_t Platform_pd::_utcb_location(unsigned int thread_id)
{
return _utcb_ptr + thread_id*L4_UtcbSize(get_kip());
return _utcb_ptr + thread_id*L4_UtcbSize(get_kip());
}
@ -348,7 +341,8 @@ Platform_pd::Platform_pd(Allocator &, char const *, signed pd_id, bool create)
Platform_pd::~Platform_pd()
{
/* unbind all threads */
while (Platform_thread *t = _next_thread()) unbind_thread(*t);
while (Platform_thread *t = _next_thread())
unbind_thread(*t);
_destroy_pd();
_free_pd();

View File

@ -17,6 +17,7 @@
/* base-internal includes */
#include <base/internal/capability_space_tpl.h>
#include <base/internal/pistachio.h>
/* core includes */
#include <platform_pd.h>
@ -24,21 +25,9 @@
#include <kip.h>
#include <print_l4_thread_id.h>
/* Pistachio includes */
namespace Pistachio
{
#include <l4/types.h>
#include <l4/thread.h>
#include <l4/schedule.h>
#include <l4/sigma0.h>
};
using namespace Genode;
using namespace Pistachio;
static const bool verbose = false;
static const bool verbose2 = true;
void Platform_thread::affinity(Affinity::Location location)
{
@ -140,9 +129,9 @@ void Platform_thread::resume()
void Platform_thread::bind(int thread_id, L4_ThreadId_t l4_thread_id,
Platform_pd &pd)
{
_thread_id = thread_id;
_l4_thread_id = l4_thread_id;
_platform_pd = &pd;
_thread_id = thread_id;
_l4_thread_id = l4_thread_id;
_platform_pd = &pd;
}

View File

@ -18,9 +18,13 @@
using namespace Genode;
void Ram_dataspace_factory::_export_ram_ds(Dataspace_component &) { }
void Ram_dataspace_factory::_revoke_ram_ds(Dataspace_component &) { }
void Ram_dataspace_factory::_clear_ds(Dataspace_component &ds)
{
memset((void *)ds.phys_addr(), 0, ds.size());

View File

@ -11,19 +11,17 @@
* under the terms of the GNU Affero General Public License version 3.
*/
/* base-internal includes */
#include <base/internal/pistachio.h>
/* core-local includes */
#include <kip.h>
#include "platform.h"
#include "util.h"
namespace Pistachio {
#include <l4/sigma0.h>
#include <l4/arch.h>
}
#include <platform.h>
#include <util.h>
using namespace Genode;
void Platform::_setup_io_port_alloc()
{
/* setup allocator */

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@ -20,11 +20,8 @@
/* Genode includes */
#include <base/thread.h>
/* Pistachio includes */
namespace Pistachio {
#include <l4/schedule.h>
#include <l4/ipc.h>
}
/* base-internal includes */
#include <base/internal/pistachio.h>
extern Pistachio::L4_ThreadId_t main_thread_tid;

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@ -17,10 +17,8 @@
/* Genode includes */
#include <base/stdint.h>
/* Pistachio includes */
namespace Pistachio {
#include <l4/types.h>
}
/* base-internal includes */
#include <base/internal/pistachio.h>
namespace Genode {

View File

@ -0,0 +1,32 @@
/*
* \brief L4ka::Pistachio system-call bindings
* \author Norman Feske
* \date 2021-02-07
*/
/*
* Copyright (C) 2021 Genode Labs GmbH
*
* This file is part of the Genode OS framework, which is distributed
* under the terms of the GNU Affero General Public License version 3.
*/
#ifndef _BASE__INTERNAL__PISTACHIO_H_
#define _BASE__INTERNAL__PISTACHIO_H_
namespace Pistachio {
#include <l4/types.h>
#include <l4/thread.h>
#include <l4/message.h>
#include <l4/ipc.h>
#include <l4/schedule.h>
#include <l4/kdebug.h>
#include <l4/kip.h>
#include <l4/space.h>
#include <l4/sigma0.h>
#include <l4/arch.h>
#include <l4/bootinfo.h>
#include <l4/misc.h>
}
#endif /* _BASE__INTERNAL__PISTACHIO_H_ */

View File

@ -14,9 +14,7 @@
#ifndef _INCLUDE__BASE__INTERNAL__RAW_WRITE_STRING_H_
#define _INCLUDE__BASE__INTERNAL__RAW_WRITE_STRING_H_
namespace Pistachio {
#include <l4/kdebug.h>
}
#include <base/internal/pistachio.h>
namespace Genode {

View File

@ -14,10 +14,7 @@
#ifndef _INCLUDE__BASE__INTERNAL__RPC_DESTINATION_H_
#define _INCLUDE__BASE__INTERNAL__RPC_DESTINATION_H_
/* Pistachio includes */
namespace Pistachio {
#include <l4/types.h>
}
#include <base/internal/pistachio.h>
namespace Genode {

View File

@ -21,12 +21,7 @@
/* base-internal includes */
#include <base/internal/ipc_server.h>
#include <base/internal/capability_space_tpl.h>
/* Pistachio includes */
namespace Pistachio {
#include <l4/types.h>
#include <l4/ipc.h>
}
#include <base/internal/pistachio.h>
using namespace Genode;
using namespace Pistachio;

View File

@ -18,11 +18,7 @@
/* base-internal includes */
#include <base/internal/native_thread.h>
#include <base/internal/globals.h>
/* Pistachio includes */
namespace Pistachio {
#include <l4/thread.h>
}
#include <base/internal/pistachio.h>
Pistachio::L4_ThreadId_t main_thread_tid;
@ -51,7 +47,10 @@ void Genode::Thread::_thread_bootstrap()
void Genode::Thread::_init_platform_thread(size_t, Type type)
{
if (type == NORMAL) { return; }
native_thread().l4id = main_thread_tid;
if (type == NORMAL)
return;
native_thread().l4id = main_thread_tid;
_thread_cap = main_thread_cap();
}