hw_x86_64: Make Idt member functions non-static

Add appropriate Idt object to Genode::Cpu class. Update the hard-coded
TSS base address.

repos/base-hw/src/core/include/spec/x86/cpu.h

@@ -37,17 +37,20 @@ namespace Kernel { using Genode::Cpu_lazy_state; }
 
 class Genode::Cpu
 {
+	private:
+		Idt _idt;
+
 	public:
 
 		Cpu()
 		{
 			/* Setup IDT only once */
 			if (primary_id() == executing_id()) {
-				Idt::setup();
+				_idt.setup();
 				Tss::setup();
 			}
 
-			Idt::load();
+			_idt.load();
 			Tss::load();
 		}
 

repos/base-hw/src/core/include/spec/x86_64/idt.h

@@ -37,19 +37,19 @@ class Genode::Idt
 		/**
 		 * IDT table
 		 */
-		static gate _table[];
+		__attribute__((aligned(8))) gate _table[SIZE_IDT];
 
 	public:
 
 		/**
 		 * Setup IDT.
 		 */
-		static void setup();
+		void setup();
 
 		/**
 		 * Load IDT into IDTR.
 		 */
-		static void load();
+		void load();
 };
 
 #endif /* _IDT_H_ */

repos/base-hw/src/core/spec/x86_64/idt.cc

@@ -12,8 +12,6 @@ class Descriptor
 		Descriptor(uint16_t l, uint64_t b) : _limit(l), _base (b) {};
 } __attribute__((packed));
 
-__attribute__((aligned(8))) Idt::gate Idt::_table[SIZE_IDT];
-
 
 void Idt::setup()
 {
@@ -38,6 +36,6 @@ void Idt::setup()
 
 void Idt::load()
 {
-	asm volatile ("lidt %0" : : "m" (Descriptor (sizeof (_table) - 1,
+	asm volatile ("lidt %0" : : "m" (Descriptor (sizeof(_table) - 1,
 				  reinterpret_cast<uint64_t>(_table))));
 }

repos/base-hw/src/core/spec/x86_64/kernel/crt0.s

@@ -170,7 +170,7 @@
 	/* GDTE_LONG | GDTE_PRESENT | GDTE_TYPE_DATA_A | GDTE_TYPE_DATA_W | GDTE_NON_SYSTEM */
 	.long 0x20f300
 	/* Task segment descriptor */
-	.long 0x11000068
+	.long 0x01000068
 	/* GDTE_PRESENT | GDTE_SYS_TSS */
 	.long 0x893a
 	.long 0