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base-hw: Make memory_region_attr CPU-specific
This patch moves the implementation of the 'Arm::memory_region_attr' function from the generic ARM code to the ARM v6/v7 specific code to enable the customization of page-table bits depending on the specific CPU core type. I.e., the ARM1176 apparently does not cope well with setting the 'Tex::bits(2)' for MMIO mappings.
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@ -145,24 +145,7 @@ namespace Arm
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*/
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template <typename T>
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static typename T::access_t
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memory_region_attr(Page_flags::access_t const flags)
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{
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typedef typename T::Tex Tex;
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typedef typename T::C C;
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typedef typename T::B B;
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/*
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* FIXME: upgrade to write-back & write-allocate when !d & c
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*/
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if(Page_flags::D::get(flags))
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return Tex::bits(2) | C::bits(0) | B::bits(0);
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if(cache_support()) {
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if(Page_flags::C::get(flags))
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return Tex::bits(5) | C::bits(0) | B::bits(1);
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return Tex::bits(6) | C::bits(1) | B::bits(0);
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}
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return Tex::bits(4) | C::bits(0) | B::bits(0);
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}
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memory_region_attr(Page_flags::access_t const flags);
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/**
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* Second level translation table
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@ -92,5 +92,28 @@ namespace Arm_v6
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bool Arm::cache_support() { return 0; }
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template <typename T>
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static typename T::access_t
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Arm::memory_region_attr(Arm::Page_flags::access_t const flags)
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{
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typedef typename T::Tex Tex;
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typedef typename T::C C;
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typedef typename T::B B;
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/*
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* FIXME: upgrade to write-back & write-allocate when !d & c
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*/
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if(Arm::Page_flags::D::get(flags))
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return 0;
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if(cache_support()) {
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if(Arm::Page_flags::C::get(flags))
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return Tex::bits(5) | C::bits(0) | B::bits(1);
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return Tex::bits(6) | C::bits(1) | B::bits(0);
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}
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return Tex::bits(4) | C::bits(0) | B::bits(0);
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}
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#endif /* _TLB__ARM_V6_H_ */
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@ -112,6 +112,31 @@ namespace Arm_v7
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}
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template <typename T>
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static typename T::access_t
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Arm::memory_region_attr(Arm::Page_flags::access_t const flags)
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{
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typedef typename T::Tex Tex;
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typedef typename T::C C;
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typedef typename T::B B;
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/*
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* FIXME: upgrade to write-back & write-allocate when !d & c
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*/
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if(Arm::Page_flags::D::get(flags))
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return Tex::bits(2) | C::bits(0) | B::bits(0);
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if(cache_support()) {
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if(Arm::Page_flags::C::get(flags))
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return Tex::bits(5) | C::bits(0) | B::bits(1);
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return Tex::bits(6) | C::bits(1) | B::bits(0);
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}
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return Tex::bits(4) | C::bits(0) | B::bits(0);
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}
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bool Arm::cache_support() { return 1; }
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