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hw: do not change x86 paging attributes on fly

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Instead of changing the attributes (e.g., Xd bit) of the top-level page-tables,
set them to allow everything. Only leafs of the paging hierarchy are set
according to the paging attributes given by core. Otherwise, top-level page-
table attributes are changed during lifetime, which requires a TLB flush
operation (not intended in the semantic of the kernel/core).
This led to problems when using the non-executable features introduced by
issue #1723 in the recent past.
This commit is contained in:
Stefan Kalkowski
2017-11-08 15:17:15 +01:00
committed by Christian Helmuth
parent c365918b82
commit d164cbac8c
5 changed files with 15 additions and 38 deletions
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2
repos/base-hw/src/bootstrap/spec/x86_64/board.h
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@ -20,8 +20,6 @@
#include <hw/spec/x86_64/cpu.h>
#include <hw/spec/x86_64/x86_64.h>
void Hw::Pml4_table::_invalidate_range(addr_t vo, size_t size) {}
namespace Bootstrap {
struct Pic {};
using Cpu = Hw::X86_64_cpu;