pci_decode: report Intel PCH GPIO device

Discovered on Tigerlake (Fujitsu U7411) and Alderlake (Framework Gen12)
notebook devices.

Issue #5195
This commit is contained in:
Christian Helmuth 2022-12-19 17:13:26 +01:00
parent 10f8da4a13
commit c4b5f11a38

View File

@ -85,7 +85,7 @@ struct Main
* *
* XXX static fixup list should be replaced by dynamic mapping of BAR * XXX static fixup list should be replaced by dynamic mapping of BAR
*/ */
static uint64_t fixup_bar_base_address(Bdf bdf, unsigned bar, uint64_t addr, size_t size) static uint64_t fixup_bar_base_address(Bdf bdf, unsigned bar, uint64_t addr, uint64_t size)
{ {
auto base_address = addr; auto base_address = addr;
@ -96,7 +96,7 @@ static uint64_t fixup_bar_base_address(Bdf bdf, unsigned bar, uint64_t addr, siz
if (bdf == Bdf { 0, 0x15, 3 } && bar == 0) base_address = 0x4017002000; if (bdf == Bdf { 0, 0x15, 3 } && bar == 0) base_address = 0x4017002000;
if (addr != base_address) if (addr != base_address)
log(bdf, " remap MEM BAR", bar, " ", Hex_range(addr, size), " to ", Hex(base_address)); log(bdf, " remap MEM BAR", bar, " ", Hex_range(addr, (size_t)size), " to ", Hex(base_address));
return base_address; return base_address;
} }
@ -181,7 +181,7 @@ bus_t Main::parse_pci_function(Bdf bdf,
{ {
addr = fixup_bar_base_address(bdf, bar, addr, size); addr = fixup_bar_base_address(bdf, bar, addr, size);
if (!addr) if (!addr)
warning(bdf, " MEM BAR", bar, " ", Hex_range(addr, size), warning(bdf, " MEM BAR", bar, " ", Hex_range(addr, (size_t)size),
" has invalid base address - consider pci-fixup in parse_pci_function()"); " has invalid base address - consider pci-fixup in parse_pci_function()");
gen.node("io_mem", [&] gen.node("io_mem", [&]
{ {
@ -499,6 +499,41 @@ void Main::parse_acpi_device_info(Xml_node const &xml, Xml_generator & gen)
}); });
}); });
}); });
/*
* Intel Tigerlake/Alderlake PCH Pinctrl/GPIO
*/
gen.node("device", [&]
{
gen.attribute("name", "INT34C5");
gen.attribute("type", "acpi");
gen.node("irq", [&]
{
gen.attribute("number", 14U);
gen.attribute("mode", "level");
gen.attribute("polarity", "low");
});
gen.node("io_mem", [&]
{
gen.attribute("address", "0xfd690000");
gen.attribute("size", "0x1000");
});
gen.node("io_mem", [&]
{
gen.attribute("address", "0xfd6a0000");
gen.attribute("size", "0x1000");
});
gen.node("io_mem", [&]
{
gen.attribute("address", "0xfd6d0000");
gen.attribute("size", "0x1000");
});
gen.node("io_mem", [&]
{
gen.attribute("address", "0xfd6e0000");
gen.attribute("size", "0x1000");
});
});
} }