base: add shared page-table code for x86_64

Issue #5217
This commit is contained in:
Johannes Schlatow 2024-04-15 14:41:29 +02:00 committed by Christian Helmuth
parent 97544ed7a9
commit c31adb77e7
7 changed files with 33 additions and 84 deletions

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@ -1,5 +1,5 @@
/*
* \brief Helper for flushing translation-table entries from cache
* \brief Helper for flushing cache lines
* \author Johannes Schlatow
* \date 2023-09-20
*/
@ -11,14 +11,14 @@
* under the terms of the GNU Affero General Public License version 3.
*/
#ifndef _SRC__DRIVERS__PLATFORM__CLFLUSH_H_
#define _SRC__DRIVERS__PLATFORM__CLFLUSH_H_
#ifndef _INCLUDE__SPEC__X86_64__CLFLUSH_H_
#define _INCLUDE__SPEC__X86_64__CLFLUSH_H_
namespace Utils {
namespace Genode {
inline void clflush(volatile void *addr)
{
asm volatile("clflush %0" : "+m" (*(volatile char *)addr));
}
}
#endif /* _SRC__DRIVERS__PLATFORM__CLFLUSH_H_ */
#endif /* _INCLUDE__SPEC__X86_64__CLFLUSH_H_ */

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@ -11,13 +11,13 @@
* under the terms of the GNU Affero General Public License version 3.
*/
#ifndef _SRC__DRIVERS__PLATFORM__PC__HW__PAGE_FLAGS_H_
#define _SRC__DRIVERS__PLATFORM__PC__HW__PAGE_FLAGS_H_
#ifndef _INCLUDE__SPEC__X86_64__PAGE_TABLE__PAGE_FLAGS_H_
#define _INCLUDE__SPEC__X86_64__PAGE_TABLE__PAGE_FLAGS_H_
#include <base/cache.h>
#include <base/output.h>
namespace Hw {
namespace Genode {
enum Writeable { RO, RW };
enum Executeable { NO_EXEC, EXEC };
@ -29,7 +29,7 @@ namespace Hw {
}
struct Hw::Page_flags
struct Genode::Page_flags
{
Writeable writeable;
Executeable executable;
@ -57,7 +57,7 @@ struct Hw::Page_flags
};
namespace Hw {
namespace Genode {
static constexpr Page_flags PAGE_FLAGS_KERN_IO
{ RW, NO_EXEC, KERN, GLOBAL, DEVICE, Genode::UNCACHED };
@ -71,4 +71,4 @@ namespace Hw {
{ RW, NO_EXEC, USER, NO_GLOBAL, RAM, Genode::CACHED };
}
#endif /* _SRC__DRIVERS__PLATFORM__PC__HW__PAGE_FLAGS_H_ */
#endif /* _INCLUDE__SPEC__X86_64__PAGE_TABLE__PAGE_FLAGS_H_ */

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@ -12,23 +12,18 @@
* under the terms of the GNU Affero General Public License version 3.
*/
#ifndef _SRC__DRIVERS__PLATFORM__PC__SPEC__X86_64__PAGE_TABLE_BASE_H_
#define _SRC__DRIVERS__PLATFORM__PC__SPEC__X86_64__PAGE_TABLE_BASE_H_
#ifndef _INCLUDE__SPEC__X86_64__PAGE_TABLE__PAGE_TABLE_BASE_H_
#define _INCLUDE__SPEC__X86_64__PAGE_TABLE__PAGE_TABLE_BASE_H_
#include <base/log.h>
#include <hw/page_flags.h>
#include <hw/util.h>
#include <page_table/page_flags.h>
#include <util/misc_math.h>
#include <clflush.h>
#include <expanding_page_table_allocator.h>
#include <cpu/clflush.h>
#define assert(expression)
namespace Genode {
using namespace Hw;
/**
* (Generic) 4-level translation structures.
*/
@ -114,7 +109,7 @@ class Genode::Final_table
desc = table_entry;
if (flush)
Utils::clflush(&desc);
clflush(&desc);
}
};
@ -130,7 +125,7 @@ class Genode::Final_table
desc = 0;
if (flush)
Utils::clflush(&desc);
clflush(&desc);
}
};
@ -165,7 +160,7 @@ class Genode::Final_table
*/
Final_table()
{
if (!Hw::aligned(this, ALIGNM_LOG2)) throw Misaligned();
if (!aligned<addr_t>((addr_t)this, ALIGNM_LOG2)) throw Misaligned();
Genode::memset(&_entries, 0, sizeof(_entries));
}
@ -280,7 +275,7 @@ class Genode::Page_directory
desc = table_entry;
if (flush)
Utils::clflush(&desc);
clflush(&desc);
return;
}
@ -292,7 +287,7 @@ class Genode::Page_directory
desc = (access_t) Td::create(table_phys);
if (flush)
Utils::clflush(&desc);
clflush(&desc);
} else if (Descriptor::maps_page(desc)) {
throw Double_insertion();
@ -349,7 +344,7 @@ class Genode::Page_directory
}
if (desc == 0 && flush)
Utils::clflush(&desc);
clflush(&desc);
}
}
};
@ -382,7 +377,7 @@ class Genode::Page_directory
Page_directory()
{
if (!Hw::aligned(this, ALIGNM_LOG2)) throw Misaligned();
if (!aligned<addr_t>((addr_t)this, ALIGNM_LOG2)) throw Misaligned();
Genode::memset(&_entries, 0, sizeof(_entries));
}
@ -487,7 +482,7 @@ class Genode::Pml4_table
desc = Descriptor::create(table_phys);
if (flush)
Utils::clflush(&desc);
clflush(&desc);
}
/* insert translation */
@ -530,7 +525,7 @@ class Genode::Pml4_table
desc = 0;
if (flush)
Utils::clflush(&desc);
clflush(&desc);
}
},
[&] () {
@ -579,7 +574,7 @@ class Genode::Pml4_table
Pml4_table()
{
if (!Hw::aligned(this, ALIGNM_LOG2)) throw Misaligned();
if (!aligned<addr_t>((addr_t)this, ALIGNM_LOG2)) throw Misaligned();
Genode::memset(&_entries, 0, sizeof(_entries));
}
@ -648,4 +643,4 @@ class Genode::Pml4_table
} __attribute__((aligned(1 << ALIGNM_LOG2)));
#endif /* _SRC__DRIVERS__PLATFORM__PC__SPEC__X86_64__PAGE_TABLE_BASE_H_ */
#endif /* _INCLUDE__SPEC__X86_64__PAGE_TABLE__PAGE_TABLE_BASE_H_ */

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@ -1,42 +0,0 @@
/*
* \brief Common utilities
* \author Martin Stein
* \author Stefan Kalkowski
* \date 2012-01-02
*/
/*
* Copyright (C) 2012-2017 Genode Labs GmbH
*
* This file is part of the Genode OS framework, which is distributed
* under the terms of the GNU Affero General Public License version 3.
*/
#ifndef _SRC__LIB__HW__UTIL_H_
#define _SRC__LIB__HW__UTIL_H_
namespace Hw {
using Genode::addr_t;
using Genode::size_t;
/**
* Return an address rounded down to a specific alignment
*
* \param addr original address
* \param alignm_log2 log2 of the required alignment
*/
constexpr addr_t trunc(addr_t addr, addr_t alignm_log2) {
return (addr >> alignm_log2) << alignm_log2; }
/**
* Return wether a pointer fullfills an alignment
*
* \param p pointer
* \param alignm_log2 log2 of the required alignment
*/
inline bool aligned(void * const p, addr_t alignm_log2) {
return (addr_t)p == trunc((addr_t)p, alignm_log2); }
}
#endif /* _SRC__LIB__HW__UTIL_H_ */

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@ -22,9 +22,7 @@
#include <util/register.h>
#include <util/xml_generator.h>
#include <pci/types.h>
/* local includes */
#include <clflush.h>
#include <cpu/clflush.h>
namespace Intel {
using namespace Genode;
@ -138,7 +136,7 @@ class Intel::Context_table
_entries[_lo_index(rid)] = lo_val;
if (flush)
Utils::clflush(&_entries[_lo_index(rid)]);
clflush(&_entries[_lo_index(rid)]);
}
void remove(Pci::rid_t rid, bool flush)
@ -148,7 +146,7 @@ class Intel::Context_table
_entries[_lo_index(rid)] = val;
if (flush)
Utils::clflush(&_entries[_lo_index(rid)]);
clflush(&_entries[_lo_index(rid)]);
}
void generate(Xml_generator &, Env &, Intel::Report_helper &);
@ -156,7 +154,7 @@ class Intel::Context_table
void flush_all()
{
for (Genode::size_t i=0; i < 512; i+=8)
Utils::clflush(&_entries[i]);
clflush(&_entries[i]);
}
Context_table()

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@ -17,7 +17,7 @@
#include <util/register.h>
#include <util/xml_generator.h>
#include <page_table_base.h>
#include <page_table/page_table_base.h>
#include <intel/report_helper.h>
namespace Intel {

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@ -22,9 +22,7 @@
#include <base/env.h>
#include <util/register.h>
#include <util/xml_generator.h>
/* local includes */
#include <clflush.h>
#include <cpu/clflush.h>
namespace Intel {
using namespace Genode;
@ -71,7 +69,7 @@ class Intel::Root_table
_entries[bus*2] = Entry::Address::masked(addr) | Entry::Present::bits(1);
if (flush)
Utils::clflush(&_entries[bus*2]);
clflush(&_entries[bus*2]);
}
void generate(Xml_generator &, Env &, Report_helper &);