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AHCI: MSI updates
Disable MSIs on device initialzation. Add ACPI-driver to run script
This commit is contained in:
committed by
Norman Feske
parent
b6e355b841
commit
c2c87c8833
@ -3,7 +3,7 @@
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#
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#
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set build_components {
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set build_components {
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core init drivers/timer drivers/pci
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core init drivers/timer drivers/pci drivers/acpi
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drivers/ahci test/ahci
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drivers/ahci test/ahci
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}
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}
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build $build_components
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build $build_components
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@ -32,10 +32,14 @@ set config {
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<default-route>
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<default-route>
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<any-service> <parent/> <any-child/> </any-service>
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<any-service> <parent/> <any-child/> </any-service>
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</default-route>
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</default-route>
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<start name="pci">
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<start name="acpi">
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<resource name="RAM" quantum="2M"/>
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<resource name="RAM" quantum="2M"/>
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<binary name="pci_drv"/>
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<binary name="acpi_drv"/>
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<provides><service name="PCI"/></provides>
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<provides><service name="PCI"/></provides>
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<route>
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<service name="ROM"> <parent/> </service>
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<any-service> <any-child/> <parent/> </any-service>
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</route>
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</start>
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</start>
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<start name="timer">
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<start name="timer">
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<resource name="RAM" quantum="1M"/>
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<resource name="RAM" quantum="1M"/>
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@ -63,7 +67,7 @@ install_config $config
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#
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#
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set boot_modules {
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set boot_modules {
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core init timer pci_drv ahci_drv test-ahci
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core init timer pci_drv ahci_drv test-ahci acpi_drv
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}
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}
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build_boot_image $boot_modules
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build_boot_image $boot_modules
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@ -563,10 +563,10 @@ class Ahci_device
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/* check for error */
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/* check for error */
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enum {
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enum {
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INT_SETUP_FIS_DMA = 0x4,
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INT_SETUP_FIS_DMA = 0x4,
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INT_SETUP_FIS_PIO = 0x2,
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INT_SETUP_FIS_PIO = 0x2,
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INT_HOST_RIGSTER_FIS = 0x1,
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INT_HOST_REGISTER_FIS = 0x1,
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INT_OK = INT_SETUP_FIS_DMA | INT_SETUP_FIS_PIO | INT_HOST_RIGSTER_FIS
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INT_OK = INT_SETUP_FIS_DMA | INT_SETUP_FIS_PIO | INT_HOST_REGISTER_FIS
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};
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};
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if (!(status & INT_OK)) {
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if (!(status & INT_OK)) {
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@ -581,6 +581,26 @@ class Ahci_device
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_port->hba_disable();
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_port->hba_disable();
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}
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}
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static void _disable_msi(::Pci::Device_client &pci)
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{
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enum { PM_CAP_OFF = 0x34, MSI_CAP = 0x5, MSI_ENABLED = 0x1 };
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uint8_t cap = pci.config_read(PM_CAP_OFF, ::Pci::Device::ACCESS_8BIT);
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/* iterate through cap pointers */
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for (uint16_t val = 0; cap; cap = val >> 8) {
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val = pci.config_read(cap, ::Pci::Device::ACCESS_16BIT);
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if ((val & 0xff) != MSI_CAP)
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continue;
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uint16_t msi = pci.config_read(cap + 2, ::Pci::Device::ACCESS_16BIT);
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if (msi & MSI_ENABLED) {
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pci.config_write(cap + 2, msi ^ MSI_CAP, ::Pci::Device::ACCESS_8BIT);
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PINF("Disabled MSIs %x", msi);
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}
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}
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}
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public:
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public:
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Ahci_device(addr_t base, Io_mem_session_capability io_cap)
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Ahci_device(addr_t base, Io_mem_session_capability io_cap)
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@ -638,11 +658,18 @@ class Ahci_device
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unsigned long intr = pci_device.config_read(AHCI_INTR_OFF,
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unsigned long intr = pci_device.config_read(AHCI_INTR_OFF,
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::Pci::Device::ACCESS_32BIT);
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::Pci::Device::ACCESS_32BIT);
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if (verbose)
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if (verbose) {
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PDBG("Interrupt pin: %lu line: %lu", (intr >> 8) & 0xff, intr & 0xff);
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PDBG("Interrupt pin: %lu line: %lu", (intr >> 8) & 0xff, intr & 0xff);
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device->_irq = new(env()->heap()) Irq_connection(intr & 0xff);
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unsigned char bus, dev, func;
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pci_device.bus_address(&bus, &dev, &func);
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PDBG("Bus address: %x:%02x.%u (0x%x)", bus, dev, func, (bus << 8) | ((dev & 0x1f) << 3) | (func & 0x7));
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}
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/* disable message signaled interrupts */
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_disable_msi(pci_device);
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device->_irq = new(env()->heap()) Irq_connection(intr & 0xff);
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pci.release_device(device_cap);
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pci.release_device(device_cap);
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/* get device ready */
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/* get device ready */
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