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gpu/intel: read execlist status multiple times (GEN < 12)

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Before scheduling we check if the execlist is empty. When many clients
are present, the bits might not be cleared by hardware yet. Before the
watchdog timer would trigger, because we scheduled nothing. Now we try
serval times, even if this fails, we still schedule because in the worst
case only a preemption would happen.

issue #4820
This commit is contained in:
Sebastian Sumpf 2023-04-24 21:19:20 +02:00 committed by Christian Helmuth
parent 75917f6595
commit bd58bd8279
1 changed files with 12 additions and 3 deletions
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15
repos/os/src/drivers/gpu/intel/main.cc
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@ -917,10 +917,19 @@ struct Igd::Device
int const port = _mmio.read<Igd::Mmio::EXECLIST_STATUS_RSCUNIT::Execlist_write_pointer>();
if (_mmio.read<Igd::Mmio::EXECLIST_STATUS_RSCUNIT::Execlist_0_valid>() ||
_mmio.read<Igd::Mmio::EXECLIST_STATUS_RSCUNIT::Execlist_1_valid>())
return;
bool empty = false;
for (unsigned i = 0; i < 100; i++) {
if (_mmio.read<Igd::Mmio::EXECLIST_STATUS_RSCUNIT::Execlist_0_valid>() == 0 &&
_mmio.read<Igd::Mmio::EXECLIST_STATUS_RSCUNIT::Execlist_1_valid>() == 0) {
empty = true;
break;
}
}
/* write list anyway, it will preempt something in the worst case */
if (!empty)
warning("exec list is not empty");
el.schedule(port);