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timer/epit: remove unused code
* use correct/more modern types * get rid of old code that was for the public use of the EPIT backend * merge Epit_base into Time_source
This commit is contained in:
Martin Stein
Christian Helmuth
parent
c9bcce57e8
commit
adfb1a77e2
@ -1,195 +0,0 @@
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/*
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* \brief Driver base for the Enhanced Periodic Interrupt Timer (Freescale)
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* \author Norman Feske
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* \author Martin Stein
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* \author Stefan Kalkowski
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* \date 2012-10-25
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*/
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/*
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* Copyright (C) 2012-2017 Genode Labs GmbH
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*
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* This file is part of the Genode OS framework, which is distributed
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* under the terms of the GNU General Public License version 2.
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*/
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#ifndef _EPIT_H_
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#define _EPIT_H_
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/* Genode includes */
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#include <util/mmio.h>
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namespace Genode { class Epit_base; }
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class Genode::Epit_base : public Mmio
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{
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protected:
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enum { TICS_PER_MS = 66000 };
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/**
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* Control register
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*/
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struct Cr : Register<0x0, 32>
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{
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struct En : Bitfield<0, 1> { }; /* enable timer */
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struct En_mod : Bitfield<1, 1> /* reload on enable */
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{
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enum { RELOAD = 1 };
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};
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struct Oci_en : Bitfield<2, 1> { }; /* interrupt on compare */
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struct Rld : Bitfield<3, 1> /* reload or roll-over */
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{
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enum { RELOAD_FROM_LR = 1 };
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};
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struct Prescaler : Bitfield<4, 12> /* clock input divisor */
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{
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enum { DIVIDE_BY_1 = 0 };
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};
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struct Swr : Bitfield<16, 1> { }; /* software reset bit */
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struct Iovw : Bitfield<17, 1> { }; /* enable overwrite */
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struct Dbg_en : Bitfield<18, 1> { }; /* enable in debug mode */
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struct Wait_en : Bitfield<19, 1> { }; /* enable in wait mode */
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struct Doz_en : Bitfield<20, 1> { }; /* enable in doze mode */
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struct Stop_en : Bitfield<21, 1> { }; /* enable in stop mode */
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struct Om : Bitfield<22, 2> /* mode of the output pin */
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{
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enum { DISCONNECTED = 0 };
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};
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struct Clk_src : Bitfield<24, 2> /* select clock input */
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{
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enum { HIGH_FREQ_REF_CLK = 2 };
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};
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/**
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* Register value that configures the timer for a one-shot run
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*/
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static access_t prepare_one_shot()
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{
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return En::bits(0) |
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En_mod::bits(En_mod::RELOAD) |
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Oci_en::bits(1) |
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Rld::bits(Rld::RELOAD_FROM_LR) |
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Prescaler::bits(Prescaler::DIVIDE_BY_1) |
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Swr::bits(0) |
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Iovw::bits(0) |
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Dbg_en::bits(0) |
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Wait_en::bits(0) |
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Doz_en::bits(0) |
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Stop_en::bits(0) |
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Om::bits(Om::DISCONNECTED) |
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Clk_src::bits(Clk_src::HIGH_FREQ_REF_CLK);
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}
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};
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/**
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* Status register
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*/
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struct Sr : Register<0x4, 32>
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{
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struct Ocif : Bitfield<0, 1> { }; /* IRQ status, write 1 clears */
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};
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struct Lr : Register<0x8, 32> { }; /* load value register */
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struct Cmpr : Register<0xc, 32> { }; /* compare value register */
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struct Cnt : Register<0x10, 32> { }; /* counter register */
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/**
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* Disable timer and clear its interrupt output
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*/
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void _reset()
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{
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/* wait until ongoing reset operations are finished */
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while (read<Cr::Swr>()) ;
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/* disable timer */
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write<Cr::En>(0);
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/* clear interrupt */
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write<Sr::Ocif>(1);
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}
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void _start_one_shot(unsigned const tics)
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{
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/* stop timer */
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_reset();
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/* configure timer for a one-shot */
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write<Cr>(Cr::prepare_one_shot());
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write<Lr>(tics);
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write<Cmpr>(0);
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/* start timer */
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write<Cr::En>(1);
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}
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public:
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/**
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* Constructor
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*/
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Epit_base(addr_t base) : Mmio(base) { _reset(); }
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/**
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* Start single timeout run
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*
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* \param tics delay of timer interrupt
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*/
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void start_one_shot(unsigned const tics)
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{
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_start_one_shot(tics);
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}
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/**
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* Stop the timer from a one-shot run
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*
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* \return last native timer value of the one-shot run
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*/
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unsigned stop_one_shot(bool &wrap)
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{
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/* disable timer */
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write<Cr::En>(0);
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return value(wrap);
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}
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/**
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* Translate microseconds to a native timer value
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*/
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unsigned us_to_tics(unsigned const us) const
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{
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return (1ULL * us * TICS_PER_MS) / 1000;
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}
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/**
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* Translate native timer value to microseconds
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*/
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unsigned tics_to_us(unsigned const tics) const
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{
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return (1ULL * tics * 1000) / TICS_PER_MS;
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}
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/**
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* Return current native timer value
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*/
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unsigned value(bool &wrapped) const
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{
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unsigned cnt = read<Cnt>();
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wrapped = (bool)read<Sr::Ocif>();
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return wrapped ? read<Cnt>() : cnt;
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}
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/**
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* Current maximum programmed timeout value
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*/
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unsigned current_max_value() const { return read<Lr>(); }
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};
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#endif /* _EPIT_H_ */
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@ -19,47 +19,61 @@
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using namespace Genode;
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using namespace Genode;
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Microseconds Timer::Time_source::max_timeout() const {
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return Microseconds(_epit.tics_to_us(~0U)); }
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void Timer::Time_source::schedule_timeout(Microseconds duration,
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void Timer::Time_source::schedule_timeout(Genode::Microseconds duration,
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Timeout_handler &handler)
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Timeout_handler &handler)
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{
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{
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/*
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/* on duration 0 trigger directly at function end and set max timeout */
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* Program max timeout in case of duration 0 to avoid lost of accuracy
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unsigned long const us = duration.value ? duration.value
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* due to wraps when value is chosen too small. Send instead a signal
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: max_timeout().value;
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* manually at end of this method.
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unsigned long const ticks = (1ULL * us * TICKS_PER_MS) / 1000;
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*/
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unsigned const tics = _epit.us_to_tics(duration.value ? duration.value
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: max_timeout().value);
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_handler = &handler;
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_handler = &handler;
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_timer_irq.ack_irq();
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_timer_irq.ack_irq();
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_epit.start_one_shot(tics);
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/* wait until ongoing reset operations are finished */
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while (read<Cr::Swr>()) ;
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/* disable timer */
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write<Cr::En>(0);
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/* clear interrupt */
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write<Sr::Ocif>(1);
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/* configure timer for a one-shot */
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write<Cr>(Cr::prepare_one_shot());
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write<Lr>(ticks);
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write<Cmpr>(0);
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/* start timer */
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write<Cr::En>(1);
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/* trigger for a timeout 0 immediately the signal */
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/* trigger for a timeout 0 immediately the signal */
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if (!duration.value)
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if (!duration.value) {
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Signal_transmitter(_signal_handler).submit();
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Signal_transmitter(_signal_handler).submit();
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}
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}
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}
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Duration Timer::Time_source::curr_time()
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Duration Timer::Time_source::curr_time()
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{
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{
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/* read EPIT status */
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/* read timer status */
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bool wrapped = false;
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unsigned long diff_ticks = 0;
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unsigned const max_value = _epit.current_max_value();
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Lr::access_t const max_value = read<Lr>();
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unsigned const tic_value = _epit.value(wrapped);
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Cnt::access_t cnt = read<Cnt>();
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unsigned passed_tics = 0;
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bool const wrapped = read<Sr::Ocif>();
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if (_irq && wrapped)
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/* determine how many ticks have passed */
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passed_tics += max_value;
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if (_irq && wrapped) {
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cnt = read<Cnt>();
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diff_ticks += max_value;
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}
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diff_ticks += max_value - cnt;
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unsigned long const diff_us = timer_ticks_to_us(diff_ticks, TICKS_PER_MS);
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passed_tics += max_value - tic_value;
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/* update time only on IRQs and if rate is under 1000 per second */
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if (_irq || diff_us > 1000) {
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if (_irq || _epit.tics_to_us(passed_tics) > 1000)
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_curr_time.add(Genode::Microseconds(diff_us));
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_curr_time_us += _epit.tics_to_us(passed_tics);
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}
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return _curr_time;
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return Duration(Microseconds(_curr_time_us));
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}
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}
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@ -17,31 +17,51 @@
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#define _TIME_SOURCE_H_
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#define _TIME_SOURCE_H_
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/* Genode includes */
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/* Genode includes */
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#include <base/attached_io_mem_dataspace.h>
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#include <irq_session/connection.h>
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#include <irq_session/connection.h>
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#include <os/duration.h>
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#include <os/attached_mmio.h>
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#include <drivers/timer/util.h>
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/* local includes */
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/* local includes */
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#include <signalled_time_source.h>
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#include <signalled_time_source.h>
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#include "epit.h"
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namespace Timer { class Time_source; }
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namespace Timer {
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using Microseconds = Genode::Microseconds;
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using Duration = Genode::Duration;
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class Time_source;
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}
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class Timer::Time_source : public Genode::Signalled_time_source
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class Timer::Time_source : public Genode::Attached_mmio,
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public Genode::Signalled_time_source
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{
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{
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private:
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private:
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Genode::Attached_io_mem_dataspace _io_mem;
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enum { TICKS_PER_MS = 66000 };
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Genode::Irq_connection _timer_irq;
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Genode::Epit_base _epit;
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struct Cr : Register<0x0, 32>
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unsigned long long mutable _curr_time_us { 0 };
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{
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struct En : Bitfield<0, 1> { };
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struct En_mod : Bitfield<1, 1> { enum { RELOAD = 1 }; };
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struct Oci_en : Bitfield<2, 1> { };
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struct Rld : Bitfield<3, 1> { enum { RELOAD_FROM_LR = 1 }; };
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struct Swr : Bitfield<16, 1> { };
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struct Clk_src : Bitfield<24, 2> { enum { HIGH_FREQ_REF_CLK = 2 }; };
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static access_t prepare_one_shot()
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{
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access_t cr = 0;
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En_mod::set(cr, En_mod::RELOAD);
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Oci_en::set(cr, 1);
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Rld::set(cr, Rld::RELOAD_FROM_LR);
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Clk_src::set(cr, Clk_src::HIGH_FREQ_REF_CLK);
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return cr;
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}
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};
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struct Sr : Register<0x4, 32> { struct Ocif : Bitfield<0, 1> { }; };
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struct Lr : Register<0x8, 32> { };
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struct Cmpr : Register<0xc, 32> { };
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struct Cnt : Register<0x10, 32> { };
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Genode::Irq_connection _timer_irq;
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Genode::Duration _curr_time { Genode::Microseconds(0) };
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Genode::Microseconds const _max_timeout { Genode::timer_ticks_to_us(~0U, TICKS_PER_MS) };
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public:
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public:
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@ -52,9 +72,9 @@ class Timer::Time_source : public Genode::Signalled_time_source
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** Genode::Time_source **
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** Genode::Time_source **
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*************************/
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*************************/
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Duration curr_time() override;
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Genode::Duration curr_time() override;
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void schedule_timeout(Microseconds duration, Timeout_handler &handler) override;
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void schedule_timeout(Genode::Microseconds duration, Timeout_handler &handler) override;
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Microseconds max_timeout() const override;
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Genode::Microseconds max_timeout() const override { return _max_timeout; };
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};
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};
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#endif /* _TIME_SOURCE_H_ */
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#endif /* _TIME_SOURCE_H_ */
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@ -24,10 +24,9 @@ using namespace Genode;
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Timer::Time_source::Time_source(Env &env)
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Timer::Time_source::Time_source(Env &env)
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:
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:
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Attached_mmio(env, Wand_quad::EPIT_2_MMIO_BASE, Wand_quad::EPIT_2_MMIO_SIZE),
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Signalled_time_source(env),
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Signalled_time_source(env),
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_io_mem(env, Wand_quad::EPIT_2_MMIO_BASE, Wand_quad::EPIT_2_MMIO_SIZE),
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_timer_irq(env, Wand_quad::EPIT_2_IRQ)
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_timer_irq(env, Wand_quad::EPIT_2_IRQ),
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_epit(reinterpret_cast<addr_t>(_io_mem.local_addr<addr_t>()))
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{
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{
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_timer_irq.sigh(_signal_handler);
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_timer_irq.sigh(_signal_handler);
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}
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}
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