diff --git a/repos/base-foc/src/core/platform.cc b/repos/base-foc/src/core/platform.cc
index c9d3d3f6b5..5cf2da0a0b 100644
--- a/repos/base-foc/src/core/platform.cc
+++ b/repos/base-foc/src/core/platform.cc
@@ -416,7 +416,7 @@ Platform::Platform() :
 	_ram_alloc(nullptr), _io_mem_alloc(core_mem_alloc()),
 	_io_port_alloc(core_mem_alloc()), _irq_alloc(core_mem_alloc()),
 	_region_alloc(core_mem_alloc()), _cap_id_alloc(core_mem_alloc()),
-	_kip_rom(Rom_module((addr_t)sigma0_map_kip(), L4_PAGESIZE, "l4v2_kip")),
+	_kip_rom((addr_t)sigma0_map_kip(), L4_PAGESIZE, "l4v2_kip"),
 	_sigma0(cap_map()->insert(_cap_id_alloc.alloc(), Fiasco::L4_BASE_PAGER_CAP))
 {
 	/*
diff --git a/repos/base-foc/src/include/base/internal/capability_data.h b/repos/base-foc/src/include/base/internal/capability_data.h
index 3357a910bb..566fe093a3 100644
--- a/repos/base-foc/src/include/base/internal/capability_data.h
+++ b/repos/base-foc/src/include/base/internal/capability_data.h
@@ -26,7 +26,7 @@
  * (platform-specific) capability space of the component. Therefore it
  * shouldn't be copied around, but only referenced by e.g. Native_capability.
  */
-class Genode::Native_capability::Data : public Avl_node<Data>, Noncopyable
+class Genode::Native_capability::Data : public Avl_node<Data>
 {
 	private:
 
diff --git a/repos/base-hw/src/core/spec/arm_v7/virtualization/kernel/vm.cc b/repos/base-hw/src/core/spec/arm_v7/virtualization/kernel/vm.cc
index 13fa00ade6..9162ab6c97 100644
--- a/repos/base-hw/src/core/spec/arm_v7/virtualization/kernel/vm.cc
+++ b/repos/base-hw/src/core/spec/arm_v7/virtualization/kernel/vm.cc
@@ -88,7 +88,7 @@ struct Kernel::Virtual_pic : Genode::Mmio
 	template <unsigned SLOT>
 	struct Gich_lr : Register<0x100 + SLOT*4, 32> { };
 
-	Vm_irq irq = Board::VT_MAINTAINANCE_IRQ;
+	Vm_irq irq { Board::VT_MAINTAINANCE_IRQ };
 
 	Virtual_pic()
 	: Genode::Mmio(Genode::Platform::mmio_to_virt(Board::IRQ_CONTROLLER_VT_CTRL_BASE)) { }
@@ -139,7 +139,7 @@ struct Kernel::Virtual_pic : Genode::Mmio
 
 struct Kernel::Virtual_timer
 {
-	Vm_irq irq = Board::VT_TIMER_IRQ;
+	Vm_irq irq { Board::VT_TIMER_IRQ };
 
 	/**
 	 * Return virtual timer object of currently executing cpu
diff --git a/repos/base-nova/src/core/platform.cc b/repos/base-nova/src/core/platform.cc
index 4fc530be92..4de3569d0f 100644
--- a/repos/base-nova/src/core/platform.cc
+++ b/repos/base-nova/src/core/platform.cc
@@ -20,6 +20,7 @@
 #include <util/string.h>
 #include <util/xml_generator.h>
 #include <trace/source_registry.h>
+#include <util/construct_at.h>
 
 /* core includes */
 #include <boot_modules.h>
@@ -737,7 +738,7 @@ Platform::Platform() :
 		addr_t core_local_addr = _map_pages(phys_addr, 1);
 		
 		Cap_range * range = reinterpret_cast<Cap_range *>(core_local_addr);
-		*range = Cap_range(index);
+		construct_at<Cap_range>(range, index);
 
 		cap_map()->insert(range);
 
diff --git a/repos/base-nova/src/lib/base/stack.cc b/repos/base-nova/src/lib/base/stack.cc
index 1b4b02246b..a271a8f188 100644
--- a/repos/base-nova/src/lib/base/stack.cc
+++ b/repos/base-nova/src/lib/base/stack.cc
@@ -91,7 +91,7 @@ void prepare_init_main_thread()
 		for (unsigned i = 0; i < CAP_RANGES; i++) {
 
 			Cap_range * range = reinterpret_cast<Cap_range *>(local[i]);
-			*range = Cap_range(index);
+			construct_at<Cap_range>(range, index);
 
 			cap_map()->insert(range);
 
diff --git a/repos/base-nova/src/test/platform/main.cc b/repos/base-nova/src/test/platform/main.cc
index 4aea5cd047..4d75a90fff 100644
--- a/repos/base-nova/src/test/platform/main.cc
+++ b/repos/base-nova/src/test/platform/main.cc
@@ -662,8 +662,7 @@ Main::Main(Env &env) : env(env)
 	static char local[128][sizeof(Cap_range)];
 
 	for (unsigned i = 0; i < sizeof(local) / sizeof (local[0]); i++) {
-		Cap_range * range = reinterpret_cast<Cap_range *>(local[i]);
-		*range = Cap_range(index);
+		Cap_range * range = construct_at<Cap_range>(local[i], index);
 
 		cap_map()->insert(range);
 
diff --git a/repos/base-sel4/src/include/base/internal/capability_space_sel4.h b/repos/base-sel4/src/include/base/internal/capability_space_sel4.h
index a6ba21f4bf..ba2c2ecfce 100644
--- a/repos/base-sel4/src/include/base/internal/capability_space_sel4.h
+++ b/repos/base-sel4/src/include/base/internal/capability_space_sel4.h
@@ -17,6 +17,7 @@
 /* base includes */
 #include <util/avl_tree.h>
 #include <base/lock.h>
+#include <util/construct_at.h>
 
 /* base-internal includes */
 #include <base/internal/capability_space.h>
@@ -193,7 +194,7 @@ class Genode::Capability_space_sel4
 			if (_caps_data[_index(data)].rpc_obj_key().valid())
 				_tree.remove(static_cast<Tree_managed_data *>(&data));
 
-			_caps_data[_index(data)] = Tree_managed_data();
+			construct_at<Tree_managed_data>(&_caps_data[_index(data)]);
 		}
 
 	public:
@@ -218,7 +219,7 @@ class Genode::Capability_space_sel4
 
 			Lock::Guard guard(_lock);
 
-			_caps_data[sel] = Tree_managed_data(args...);
+			construct_at<Tree_managed_data>(&_caps_data[sel], args...);
 
 			if (_caps_data[sel].rpc_obj_key().valid())
 				_tree.insert(&_caps_data[sel]);
diff --git a/repos/base/include/base/id_space.h b/repos/base/include/base/id_space.h
index b7cb484d63..fd0ea79f73 100644
--- a/repos/base/include/base/id_space.h
+++ b/repos/base/include/base/id_space.h
@@ -39,7 +39,7 @@ class Genode::Id_space : public Noncopyable
 		class Out_of_ids     : Exception { };
 		class Conflicting_id : Exception { };
 
-		class Element : public Avl_node<Element>, Noncopyable
+		class Element : public Avl_node<Element>
 		{
 			private:
 
diff --git a/repos/base/include/util/avl_string.h b/repos/base/include/util/avl_string.h
index 06ad704a68..11d6391afd 100644
--- a/repos/base/include/util/avl_string.h
+++ b/repos/base/include/util/avl_string.h
@@ -28,7 +28,7 @@ class Genode::Avl_string_base : public Avl_node<Avl_string_base>
 {
 	private:
 
-		const char *_str;
+		struct { const char *_str; };
 
 	protected:
 
diff --git a/repos/base/include/util/avl_tree.h b/repos/base/include/util/avl_tree.h
index b5800b95b0..d239afd4e8 100644
--- a/repos/base/include/util/avl_tree.h
+++ b/repos/base/include/util/avl_tree.h
@@ -15,6 +15,7 @@
 #define _INCLUDE__UTIL__AVL_TREE_H_
 
 #include <util/misc_math.h>
+#include <util/noncopyable.h>
 
 namespace Genode {
 	
@@ -24,7 +25,7 @@ namespace Genode {
 }
 
 
-class Genode::Avl_node_base
+class Genode::Avl_node_base : Noncopyable
 {
 	protected:
 
@@ -58,9 +59,11 @@ class Genode::Avl_node_base
 			virtual void recompute(Avl_node_base *) { }
 		};
 
-		Avl_node_base *_child[2];  /* left and right subtrees */
-		Avl_node_base *_parent;    /* parent of subtree       */
-		unsigned char  _depth;     /* depth of subtree        */
+		struct {
+			Avl_node_base *_child[2];  /* left and right subtrees */
+			Avl_node_base *_parent;    /* parent of subtree       */
+			unsigned char  _depth;     /* depth of subtree        */
+		};
 
 	public:
 
diff --git a/repos/base/src/include/base/internal/capability_space_tpl.h b/repos/base/src/include/base/internal/capability_space_tpl.h
index c5e0f0b348..bd31c669f3 100644
--- a/repos/base/src/include/base/internal/capability_space_tpl.h
+++ b/repos/base/src/include/base/internal/capability_space_tpl.h
@@ -25,6 +25,7 @@
 #include <util/bit_allocator.h>
 #include <base/lock.h>
 #include <base/log.h>
+#include <util/construct_at.h>
 
 /* base-internal includes */
 #include <base/internal/capability_space.h>
@@ -149,7 +150,7 @@ class Genode::Capability_space_tpl
 
 			addr_t const index = _alloc.alloc();
 
-			_caps_data[index] = Tree_managed_data(args...);
+			construct_at<Tree_managed_data>(&_caps_data[index], args...);
 
 			if (_caps_data[index].rpc_obj_key().valid())
 				_tree.insert(&_caps_data[index]);
diff --git a/repos/os/src/server/nic_router/dhcp_server.h b/repos/os/src/server/nic_router/dhcp_server.h
index 7acb0675e2..387a103c90 100644
--- a/repos/os/src/server/nic_router/dhcp_server.h
+++ b/repos/os/src/server/nic_router/dhcp_server.h
@@ -83,8 +83,7 @@ class Net::Dhcp_server : private Genode::Noncopyable
 };
 
 
-struct Net::Dhcp_allocation_tree : public  Genode::Avl_tree<Dhcp_allocation>,
-                                   private Genode::Noncopyable
+struct Net::Dhcp_allocation_tree : public  Genode::Avl_tree<Dhcp_allocation>
 {
 	struct No_match : Genode::Exception { };
 
@@ -93,8 +92,7 @@ struct Net::Dhcp_allocation_tree : public  Genode::Avl_tree<Dhcp_allocation>,
 
 
 class Net::Dhcp_allocation : public  Genode::Avl_node<Dhcp_allocation>,
-                             public  Dhcp_allocation_list::Element,
-                             private Genode::Noncopyable
+                             public  Dhcp_allocation_list::Element
 {
 	protected:
 
diff --git a/repos/os/src/server/vmm/main.cc b/repos/os/src/server/vmm/main.cc
index c9933d53a4..c17b643a87 100644
--- a/repos/os/src/server/vmm/main.cc
+++ b/repos/os/src/server/vmm/main.cc
@@ -429,45 +429,71 @@ class Vmm
 		{
 			private:
 
-				Register _regs[27] {
-					{  0, 0, 0, 0, "MIDR",   false, &State::midr,   0x412fc0f1 },
-					{  0, 0, 0, 5, "MPIDR",  false, &State::mpidr,  0x40000000 },
-					{  0, 0, 0, 1, "CTR",    false, &State::ctr,    0x8444c004 },
-					{  0, 1, 0, 0, "CCSIDR", false, &State::ccsidr, 0x701fe00a },
-					{  0, 1, 0, 1, "CLIDR",  false, &State::clidr,  0x0a200023 },
-					{  0, 0, 1, 0, "PFR0",   false, &State::pfr0,   0x00001031 },
-					{  0, 0, 1, 4, "MMFR0",  false, &State::mmfr0,  0x10201105 },
-					{  0, 0, 2, 0, "ISAR0",  false, &State::isar0,  0x02101110 },
-					{  0, 0, 2, 3, "ISAR3",  false, &State::isar3,  0x11112131 },
-					{  0, 0, 2, 4, "ISAR4",  false, &State::isar4,  0x10011142 },
-					{  0, 2, 0, 0, "CSSELR", true,  &State::csselr, 0x00000000 },
-					{  1, 0, 0, 0, "SCTRL",  true,  &State::sctrl,  0 /* 0xc5007a 0x00c5187a*/ },
-					{  1, 0, 0, 1, "ACTRL",  true,  &State::actrl,  0x00000040 },
-					{  1, 0, 0, 2, "CPACR",  true,  &State::cpacr,  0x00000000 },
-					{  2, 0, 0, 0, "TTBR0",  true,  &State::ttbr0,  0x00000000 },
-					{  2, 0, 0, 1, "TTBR1",  true,  &State::ttbr1,  0x00000000 },
-					{  2, 0, 0, 2, "TTBCR",  true,  &State::ttbcr,  0x00000000 },
-					{  3, 0, 0, 0, "DACR",   true,  &State::dacr,   0x55555555 },
-					{  5, 0, 0, 0, "DFSR",   true,  &State::dfsr,   0x00000000 },
-					{  5, 0, 0, 1, "IFSR",   true,  &State::ifsr,   0x00000000 },
-					{  5, 0, 1, 0, "ADFSR",  true,  &State::adfsr,  0x00000000 },
-					{  5, 0, 1, 1, "AIFSR",  true,  &State::aifsr,  0x00000000 },
-					{  6, 0, 0, 0, "DFAR",   true,  &State::dfar,   0x00000000 },
-					{  6, 0, 0, 2, "IFAR",   true,  &State::ifar,   0x00000000 },
-					{ 10, 0, 2, 0, "PRRR",   true,  &State::prrr,   0x00098aa4 },
-					{ 10, 0, 2, 1, "NMRR",   true,  &State::nmrr,   0x44e048e0 },
-					{ 13, 0, 0, 1, "CONTEXTIDR", true,  &State::cidr,  0x00000000 }
-				};
+				Register _regs_0  {  0, 0, 0, 0, "MIDR",       false, &State::midr,   0x412fc0f1 };
+				Register _regs_1  {  0, 0, 0, 5, "MPIDR",      false, &State::mpidr,  0x40000000 };
+				Register _regs_2  {  0, 0, 0, 1, "CTR",        false, &State::ctr,    0x8444c004 };
+				Register _regs_3  {  0, 1, 0, 0, "CCSIDR",     false, &State::ccsidr, 0x701fe00a };
+				Register _regs_4  {  0, 1, 0, 1, "CLIDR",      false, &State::clidr,  0x0a200023 };
+				Register _regs_5  {  0, 0, 1, 0, "PFR0",       false, &State::pfr0,   0x00001031 };
+				Register _regs_6  {  0, 0, 1, 4, "MMFR0",      false, &State::mmfr0,  0x10201105 };
+				Register _regs_7  {  0, 0, 2, 0, "ISAR0",      false, &State::isar0,  0x02101110 };
+				Register _regs_8  {  0, 0, 2, 3, "ISAR3",      false, &State::isar3,  0x11112131 };
+				Register _regs_9  {  0, 0, 2, 4, "ISAR4",      false, &State::isar4,  0x10011142 };
+				Register _regs_10 {  0, 2, 0, 0, "CSSELR",     true,  &State::csselr, 0x00000000 };
+				Register _regs_11 {  1, 0, 0, 0, "SCTRL",      true,  &State::sctrl,  0 /* 0xc5007a 0x00c5187a*/ };
+				Register _regs_12 {  1, 0, 0, 1, "ACTRL",      true,  &State::actrl,  0x00000040 };
+				Register _regs_13 {  1, 0, 0, 2, "CPACR",      true,  &State::cpacr,  0x00000000 };
+				Register _regs_14 {  2, 0, 0, 0, "TTBR0",      true,  &State::ttbr0,  0x00000000 };
+				Register _regs_15 {  2, 0, 0, 1, "TTBR1",      true,  &State::ttbr1,  0x00000000 };
+				Register _regs_16 {  2, 0, 0, 2, "TTBCR",      true,  &State::ttbcr,  0x00000000 };
+				Register _regs_17 {  3, 0, 0, 0, "DACR",       true,  &State::dacr,   0x55555555 };
+				Register _regs_18 {  5, 0, 0, 0, "DFSR",       true,  &State::dfsr,   0x00000000 };
+				Register _regs_19 {  5, 0, 0, 1, "IFSR",       true,  &State::ifsr,   0x00000000 };
+				Register _regs_20 {  5, 0, 1, 0, "ADFSR",      true,  &State::adfsr,  0x00000000 };
+				Register _regs_21 {  5, 0, 1, 1, "AIFSR",      true,  &State::aifsr,  0x00000000 };
+				Register _regs_22 {  6, 0, 0, 0, "DFAR",       true,  &State::dfar,   0x00000000 };
+				Register _regs_23 {  6, 0, 0, 2, "IFAR",       true,  &State::ifar,   0x00000000 };
+				Register _regs_24 { 10, 0, 2, 0, "PRRR",       true,  &State::prrr,   0x00098aa4 };
+				Register _regs_25 { 10, 0, 2, 1, "NMRR",       true,  &State::nmrr,   0x44e048e0 };
+				Register _regs_26 { 13, 0, 0, 1, "CONTEXTIDR", true,  &State::cidr,   0x00000000 };
+
+				void _init_reg(Register &reg, State &state)
+				{
+					_reg_tree.insert(&reg);
+					reg.write(state, reg.init_value());
+				}
 
 			public:
 
 				Cp15(State & state)
 				{
-					for (unsigned i = 0; i < (sizeof(_regs) / sizeof(Register));
-						 i++) {
-						_reg_tree.insert(&_regs[i]);
-						_regs[i].write(state, _regs[i].init_value());
-					}
+					_init_reg(_regs_0, state);
+					_init_reg(_regs_1, state);
+					_init_reg(_regs_2, state);
+					_init_reg(_regs_3, state);
+					_init_reg(_regs_4, state);
+					_init_reg(_regs_5, state);
+					_init_reg(_regs_6, state);
+					_init_reg(_regs_7, state);
+					_init_reg(_regs_8, state);
+					_init_reg(_regs_9, state);
+					_init_reg(_regs_10, state);
+					_init_reg(_regs_11, state);
+					_init_reg(_regs_12, state);
+					_init_reg(_regs_13, state);
+					_init_reg(_regs_14, state);
+					_init_reg(_regs_15, state);
+					_init_reg(_regs_16, state);
+					_init_reg(_regs_17, state);
+					_init_reg(_regs_18, state);
+					_init_reg(_regs_19, state);
+					_init_reg(_regs_20, state);
+					_init_reg(_regs_21, state);
+					_init_reg(_regs_22, state);
+					_init_reg(_regs_23, state);
+					_init_reg(_regs_24, state);
+					_init_reg(_regs_25, state);
+					_init_reg(_regs_26, state);
 				}
 		};