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https://github.com/genodelabs/genode.git
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5673c163fb
commit
ab6315d6b4
@ -87,7 +87,7 @@ Vcpu::Vcpu(Constrained_ram_allocator &ram_alloc,
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{
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{
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try {
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try {
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/* create ds for vCPU state */
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/* create ds for vCPU state */
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_ds_cap = _ram_alloc.alloc(4096, Cache_attribute::CACHED);
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_ds_cap = _ram_alloc.alloc(0x1000, Cache_attribute::CACHED);
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} catch (...) {
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} catch (...) {
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throw;
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throw;
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}
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}
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@ -13,6 +13,7 @@
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/* Base includes */
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/* Base includes */
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#include <base/cache.h>
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#include <base/cache.h>
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#include <cpu/vm_state.h>
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#include <util/list.h>
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#include <util/list.h>
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#include <util/flex_iterator.h>
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#include <util/flex_iterator.h>
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@ -65,7 +66,8 @@ Vm_session_component::Vcpu::Vcpu(Constrained_ram_allocator &ram_alloc,
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try {
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try {
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/* create ds for vCPU state */
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/* create ds for vCPU state */
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_ds_cap = _ram_alloc.alloc(4096, Cache_attribute::CACHED);
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_ds_cap = _ram_alloc.alloc(align_addr(sizeof(Genode::Vm_state), 12),
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Cache_attribute::CACHED);
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} catch (...) {
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} catch (...) {
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_cap_alloc.replenish(Cap_quota{CAP_RANGE});
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_cap_alloc.replenish(Cap_quota{CAP_RANGE});
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cap_map().remove(_sel_sm_ec_sc, CAP_RANGE_LOG2);
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cap_map().remove(_sel_sm_ec_sc, CAP_RANGE_LOG2);
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@ -58,6 +58,12 @@ struct Vcpu {
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state = Vm_state {};
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state = Vm_state {};
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state.exit_reason = exit_reason;
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state.exit_reason = exit_reason;
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if (utcb.mtd & Nova::Mtd::FPU) {
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state.fpu.value([&] (uint8_t *fpu, size_t const) {
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asm volatile ("fxsave %0" : "=m" (*fpu));
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});
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}
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if (utcb.mtd & Nova::Mtd::ACDB) {
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if (utcb.mtd & Nova::Mtd::ACDB) {
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state.ax.value(utcb.ax);
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state.ax.value(utcb.ax);
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state.cx.value(utcb.cx);
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state.cx.value(utcb.cx);
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@ -190,7 +196,6 @@ struct Vcpu {
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state.tpr_threshold.value(utcb.read_tpr_threshold());
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state.tpr_threshold.value(utcb.read_tpr_threshold());
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}
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}
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/* XXX FPU state missing */
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}
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}
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static void _write_nova_state(Nova::Utcb &utcb, Vm_state &state)
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static void _write_nova_state(Nova::Utcb &utcb, Vm_state &state)
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@ -389,6 +394,12 @@ struct Vcpu {
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utcb.write_tpr(state.tpr.value());
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utcb.write_tpr(state.tpr.value());
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utcb.write_tpr_threshold(state.tpr_threshold.value());
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utcb.write_tpr_threshold(state.tpr_threshold.value());
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}
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}
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if (state.fpu.valid()) {
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state.fpu.value([&] (uint8_t *fpu, size_t const) {
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asm volatile ("fxrstor %0" : : "m" (*fpu));
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});
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}
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}
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}
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void _dispatch()
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void _dispatch()
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@ -655,7 +666,8 @@ struct Vcpu {
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if (state.qual_primary.valid() || state.qual_secondary.valid())
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if (state.qual_primary.valid() || state.qual_secondary.valid())
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mtd |= Nova::Mtd::QUAL;
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mtd |= Nova::Mtd::QUAL;
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/* XXX FPU missing */
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if (state.fpu.valid())
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mtd |= Nova::Mtd::FPU;
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state = Vm_state {};
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state = Vm_state {};
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@ -13,6 +13,7 @@
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/* base includes */
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/* base includes */
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#include <util/flex_iterator.h>
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#include <util/flex_iterator.h>
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#include <cpu/vm_state.h>
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/* core includes */
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/* core includes */
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#include <core_env.h>
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#include <core_env.h>
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@ -45,7 +46,8 @@ Vm_session_component::Vcpu::Vcpu(Constrained_ram_allocator &ram_alloc,
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seL4_Untyped const service)
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seL4_Untyped const service)
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:
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:
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_ram_alloc(ram_alloc),
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_ram_alloc(ram_alloc),
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_ds_cap (_ram_alloc.alloc(4096, Cache_attribute::CACHED)),
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_ds_cap (_ram_alloc.alloc(align_addr(sizeof(Genode::Vm_state), 12),
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Cache_attribute::CACHED)),
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_vcpu_id(vcpu_id)
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_vcpu_id(vcpu_id)
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{
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{
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try {
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try {
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@ -141,6 +141,30 @@ struct Genode::Vm_state
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Register<uint32_t> tpr_threshold;
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Register<uint32_t> tpr_threshold;
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unsigned exit_reason;
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unsigned exit_reason;
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class Fpu {
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private :
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uint8_t _value[512] { };
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bool _valid { false };
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public:
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bool valid() const { return _valid; }
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void invalid() { _valid = false; }
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template <typename FUNC>
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void value(FUNC const &fn) {
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_valid = true;
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fn(_value, sizeof(_value));
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};
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Fpu &operator = (Fpu const &)
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{
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_valid = false;
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return *this;
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}
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} fpu __attribute__((aligned(16)));
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};
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};
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#endif /* _INCLUDE__SPEC__X86__CPU__VM_STATE_H_ */
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#endif /* _INCLUDE__SPEC__X86__CPU__VM_STATE_H_ */
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