ExternalVendorCode/genode
1
0
Fork 0
mirror of https://github.com/genodelabs/genode.git synced 2025-01-31 00:24:51 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

timer: add dummy implementation for RISC-V

Browse Source
This commit is contained in:
Sebastian Sumpf 2016-02-16 16:39:45 +01:00 committed by Christian Helmuth
parent e367c99864
commit a66df55f4e
2 changed files with 35 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
repos/os/lib/mk/spec/riscv/hw_timer.mk Normal file
View File

@ -0,0 +1,3 @@
INC_DIR += $(REP_DIR)/src/drivers/timer/spec/hw $(REP_DIR)/src/drivers/timer/spec/hw/spec/riscv
include $(REP_DIR)/lib/mk/timer.inc

32
repos/os/src/drivers/timer/spec/hw/spec/riscv/platform_timer_base.h Normal file
View File

@ -0,0 +1,32 @@
/*
* \brief Dummy platform timer
* \author Sebastian Sumpf
* \date 2016-02-10
*/
/*
* Copyright (C) 2016 Genode Labs GmbH
*
* This file is part of the Genode OS framework, which is distributed
* under the terms of the GNU General Public License version 2.
*/
#ifndef _HW__RISCV__PLATFORM_TIMER_BASE_H_
#define _HW__RISCV__PLATFORM_TIMER_BASE_H_
class Platform_timer_base
{
public:
enum { IRQ };
unsigned long tics_to_us(unsigned long const tics) const { return 0; }
unsigned long us_to_tics(unsigned long const us) const { return 0; }
unsigned long max_value() const { return 0; }
unsigned long value(bool & wrapped) const { return 0; }
void run_and_wrap(unsigned long value) { }
};
#endif /* _HW__RISCV__PLATFORM_TIMER_BASE_H_ */