diff --git a/repos/base-hw/src/core/include/spec/x86/cpu.h b/repos/base-hw/src/core/include/spec/x86/cpu.h
index 7315262a56..2d3a89f31e 100644
--- a/repos/base-hw/src/core/include/spec/x86/cpu.h
+++ b/repos/base-hw/src/core/include/spec/x86/cpu.h
@@ -54,7 +54,7 @@ class Genode::Cpu
 				Tss::setup();
 			}
 
-			_idt->load();
+			_idt->load(Cpu::exception_entry);
 			Tss::load();
 		}
 
diff --git a/repos/base-hw/src/core/include/spec/x86_64/idt.h b/repos/base-hw/src/core/include/spec/x86_64/idt.h
index 67666a9d85..69b3d90543 100644
--- a/repos/base-hw/src/core/include/spec/x86_64/idt.h
+++ b/repos/base-hw/src/core/include/spec/x86_64/idt.h
@@ -54,8 +54,10 @@ class Genode::Idt
 
 		/**
 		 * Load IDT into IDTR.
+		 *
+		 * \param virt_base  virtual base address of mode transition pages
 		 */
-		void load();
+		void load(addr_t const virt_base);
 };
 
 #endif /* _IDT_H_ */
diff --git a/repos/base-hw/src/core/spec/x86_64/idt.cc b/repos/base-hw/src/core/spec/x86_64/idt.cc
index a14b1d82f2..a4a7e6e7fa 100644
--- a/repos/base-hw/src/core/spec/x86_64/idt.cc
+++ b/repos/base-hw/src/core/spec/x86_64/idt.cc
@@ -44,7 +44,7 @@ void Idt::setup()
 }
 
 
-void Idt::load()
+void Idt::load(addr_t const virt_base)
 {
 	asm volatile ("lidt %0" : : "m" (Descriptor (sizeof(_table) - 1,
 				  reinterpret_cast<uint64_t>(_table))));