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run: extend pci test to show more information
Add some more vendors and classcode decoding. Additionally, walk PCI cap space of each device and decode some of the types. Issue #3928
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@ -5,7 +5,7 @@
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*/
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/*
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* Copyright (C) 2008-2017 Genode Labs GmbH
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* Copyright (C) 2008-2020 Genode Labs GmbH
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*
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* This file is part of the Genode OS framework, which is distributed
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* under the terms of the GNU Affero General Public License version 3.
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@ -19,8 +19,83 @@
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using namespace Genode;
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enum { INTEL_VENDOR_ID = 0x8086 };
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enum { AMD_VENDOR_ID = 0x1022, INTEL_VENDOR_ID = 0x8086 };
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enum {
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CLASS_CODE_SATA = 0x106,
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CLASS_CODE_ETHERNET = 0x200,
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CLASS_CODE_VGA = 0x300,
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CLASS_CODE_HOST_BRIDGE = 0x600,
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CLASS_CODE_HOST_ISA = 0x601,
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CLASS_CODE_PCI_PCI_BRIDGE = 0x604,
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CLASS_CODE_IOMMU = 0x806,
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CLASS_CODE_USB = 0xc03,
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CLASS_CODE_SMBUS = 0xc05,
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};
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enum {
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USB_UHCI = 0x00,
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USB_OHCI = 0x10,
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USB_EHCI = 0x20,
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USB_XHCI = 0x30
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};
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enum {
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DEVICE_AMD_HUDSON2_SMBUS = 0x780b,
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};
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enum {
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CAP_MSI = 0x05,
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CAP_HT = 0x08,
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CAP_SECDEV = 0x0f,
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CAP_PCI_E = 0x10,
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CAP_MSIX = 0x11
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};
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enum {
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EXT_CAP_ERRREP = 0x01, /* advanced error reporting */
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EXT_CAP_DEVSNR = 0x03, /* device serial number */
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EXT_CAP_VENDOR = 0x0b, /* vendor specific */
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EXT_CAP_ACSERV = 0x0d, /* access control service */
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};
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typedef Platform::Device::Access_size Size;
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static void dump_extended_pci_caps(Platform::Device_client &device)
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{
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unsigned cap = 0x100;
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unsigned max_caps = (0x1000 - cap) / 8;
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String<128> cap_string { };
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while (max_caps) {
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unsigned const val = device.config_read(cap, Size::ACCESS_32BIT);
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switch (val & 0xffff) {
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case 0:
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break;
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case EXT_CAP_ERRREP:
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cap_string = String<128>(cap_string, " ERR_REP");
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break;
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case EXT_CAP_DEVSNR:
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cap_string = String<128>(cap_string, " DEV_SNR");
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break;
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case EXT_CAP_VENDOR:
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cap_string = String<128>(cap_string, " VENDOR");
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break;
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case EXT_CAP_ACSERV:
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cap_string = String<128>(cap_string, " ACS");
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break;
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default:
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cap_string = String<128>(cap_string, " ", Hex(val & 0xffff));
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};
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max_caps --;
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cap = (val >> 20) & 0xffc;
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if (cap <= 0x100 || cap >= 0x1000 - 4 /* size of 32Bit */)
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break;
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}
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if (cap_string.valid())
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log(" ECAP:", cap_string);
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}
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/**
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* Print device information
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@ -36,17 +111,48 @@ static void print_device_info(Platform::Device_capability device_cap)
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unsigned char bus = 0, dev = 0, fun = 0;
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device.bus_address(&bus, &dev, &fun);
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unsigned short vendor_id = device.vendor_id();
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unsigned short device_id = device.device_id();
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unsigned class_code = device.class_code() >> 8;
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unsigned short const vendor_id = device.vendor_id();
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unsigned short const device_id = device.device_id();
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unsigned const class_code = device.class_code() >> 8;
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unsigned char const revision = device.config_read(0x8, Size::ACCESS_8BIT);
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unsigned char const prog_if = device.config_read(0x9, Size::ACCESS_8BIT);
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unsigned const pci_cmd = device.config_read(0x4, Size::ACCESS_16BIT);
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log(Hex(bus, Hex::OMIT_PREFIX), ":",
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Hex(dev, Hex::OMIT_PREFIX), ".",
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Hex(fun, Hex::OMIT_PREFIX), " "
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"class=", Hex(class_code), " "
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"vendor=", Hex(vendor_id), " ",
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(vendor_id == INTEL_VENDOR_ID ? "(Intel)" : "(unknown)"),
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" device=", Hex(device_id));
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"class=", Hex(class_code), " ",
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(class_code == CLASS_CODE_VGA) ? "(VGA)" :
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(class_code == CLASS_CODE_HOST_BRIDGE) ? "(bridge host)" :
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(class_code == CLASS_CODE_HOST_ISA) ? "(bridge ISA)" :
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(class_code == CLASS_CODE_PCI_PCI_BRIDGE) ? "(bridge PCI)" :
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(class_code == CLASS_CODE_IOMMU) ? "(IOMMU)" :
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(class_code == CLASS_CODE_USB) ? "(USB)" :
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(class_code == CLASS_CODE_SMBUS) ? "(SMBUS)" :
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(class_code == CLASS_CODE_SATA) ? "(SATA)" : "",
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(class_code == CLASS_CODE_ETHERNET) ? "(Ethernet)" : "",
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" vendor=", Hex(vendor_id), " ",
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((vendor_id == INTEL_VENDOR_ID) ? "(Intel)" :
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(vendor_id == AMD_VENDOR_ID) ? "(AMD)" : "(unknown)"),
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" device=", Hex(device_id),
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" prog_if=", Genode::Hex(prog_if),
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(class_code != CLASS_CODE_USB) ? "" :
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(prog_if == USB_UHCI) ? "(UHCI)" :
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(prog_if == USB_OHCI) ? "(OHCI)" :
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(prog_if == USB_EHCI) ? "(EHCI)" :
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(prog_if == USB_XHCI) ? "(XHCI)" : "",
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" revision=", Genode::Hex(revision),
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" pci_cmd=", Genode::Hex(pci_cmd));
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if (vendor_id == AMD_VENDOR_ID && device_id == DEVICE_AMD_HUDSON2_SMBUS) {
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if (revision >= 0x11 && revision <= 0x14)
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log("chipset: AMD HUDSON2");
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else if (revision >= 0x15 && revision <= 0x18)
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log("chipset: AMD BOLTON");
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else if (revision >= 0x39 && revision <= 0x3a)
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log("chipset: AMD ANGTZE");
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}
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for (int resource_id = 0; resource_id < 6; resource_id++) {
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@ -54,13 +160,49 @@ static void print_device_info(Platform::Device_capability device_cap)
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Resource const resource = device.resource(resource_id);
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if (resource.type() != Resource::INVALID)
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if (resource.type() != Resource::INVALID) {
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log(" Resource ", resource_id, " "
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"(", (resource.type() == Resource::IO ? "I/O" : "MEM"), "): "
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"base=", Genode::Hex(resource.base()), " "
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"size=", Genode::Hex(resource.size()), " ",
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(resource.prefetchable() ? "prefetchable" : ""));
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"base=", Genode::Hex(resource.base()), " "
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"size=", Genode::Hex(resource.size()), " ",
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(resource.prefetchable() ? "prefetchable" : "")
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);
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}
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}
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unsigned cap = device.config_read(0x34, Size::ACCESS_8BIT);
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if (cap) {
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String<128> cap_string { };
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for (Genode::uint32_t val = 0; cap; cap = (val >> 8) & 0xff) {
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val = device.config_read(cap, Size::ACCESS_32BIT);
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unsigned const type = val & 0xff;
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switch (type) {
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case CAP_MSI: {
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uint16_t msi_val = device.config_read(cap + 2, Size::ACCESS_16BIT);
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if (msi_val & 0x80)
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cap_string = String<128>(cap_string, " MSI-64");
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else
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cap_string = String<128>(cap_string, " MSI");
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break;
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}
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case CAP_HT: cap_string = String<128>(cap_string, " HYPERTRANSPORT"); break;
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case CAP_MSIX: cap_string = String<128>(cap_string, " MSI-X"); break;
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case CAP_PCI_E: cap_string = String<128>(cap_string, " PCI-E"); break;
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case CAP_SECDEV: cap_string = String<128>(cap_string, " SECURE-DEVICE"); break;
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default:
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cap_string = String<128>(cap_string, " ", Hex(type));
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}
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if (type == CAP_PCI_E) {
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uint16_t flags = device.config_read(cap + 2, Size::ACCESS_16BIT);
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uint8_t type = (flags >> 4) & 0xf;
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cap_string = String<128>(cap_string, "(T", Hex(type, Hex::OMIT_PREFIX), ")");
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}
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}
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log(" CAP:", cap_string);
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}
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dump_extended_pci_caps(device);
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}
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