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base-hw: reduce includes in board.h
The includes for the address-space-ID allocator and the translation table are usually specific to the CPU in use. Therefore these includes can be moved from their current location in the board header to the CPU headers. This reduces the number of decisions a board maintainer has to make if the CPU model he's aiming for is already available. This can probably also be applied for other includes in the board headers but I intentionally leave it for a future commit as I don't have the time to do it all now. Ref #4217
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@ -22,9 +22,7 @@
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/* base-hw Core includes */
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#include <spec/arm/imx_epit.h>
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#include <spec/arm/trustzone_board.h>
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#include <spec/arm/address_space_id_allocator.h>
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#include <spec/cortex_a8/cpu.h>
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#include <spec/cortex_a8/translation_table.h>
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namespace Board { using namespace Hw::Imx53_qsb_board; }
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@ -20,9 +20,7 @@
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/* base-hw Core includes */
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#include <spec/arm/cortex_a9_private_timer.h>
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#include <spec/arm/address_space_id_allocator.h>
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#include <spec/cortex_a9/cpu.h>
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#include <spec/cortex_a9/translation_table.h>
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namespace Board {
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@ -22,9 +22,7 @@
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#include <spec/arm/generic_timer.h>
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#include <spec/arm/cpu/vm_state_virtualization.h>
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#include <spec/arm/virtualization/board.h>
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#include <spec/arm/address_space_id_allocator.h>
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#include <spec/cortex_a15/cpu.h>
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#include <spec/cortex_a15/translation_table.h>
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namespace Board {
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@ -20,9 +20,7 @@
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/* base-hw Core includes */
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#include <spec/arm/generic_timer.h>
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#include <spec/arm/virtualization/gicv3.h>
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#include <spec/arm_v8/address_space_id_allocator.h>
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#include <spec/arm_v8/cpu.h>
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#include <spec/arm_v8/translation_table.h>
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/* base-hw includes */
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#include <spec/arm_64/cpu/vm_state_virtualization.h>
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@ -20,9 +20,7 @@
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/* base-hw Core includes */
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#include <spec/arm/cortex_a9_private_timer.h>
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#include <spec/arm/address_space_id_allocator.h>
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#include <spec/cortex_a9/cpu.h>
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#include <spec/cortex_a9/translation_table.h>
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namespace Board {
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@ -20,9 +20,7 @@
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/* base-hw Core includes */
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#include <spec/arm/cortex_a9_private_timer.h>
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#include <spec/arm/address_space_id_allocator.h>
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#include <spec/cortex_a9/cpu.h>
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#include <spec/cortex_a9/translation_table.h>
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namespace Board {
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@ -20,9 +20,7 @@
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/* base-hw Core includes */
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#include <spec/x86_64/pic.h>
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#include <spec/x86_64/pit.h>
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#include <spec/x86_64/address_space_id_allocator.h>
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#include <spec/x86_64/cpu.h>
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#include <spec/x86_64/translation_table.h>
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namespace Board {
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@ -19,14 +19,9 @@
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/* base-hw Core includes */
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#include <spec/riscv/pic.h>
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#include <spec/riscv/address_space_id_allocator.h>
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#include <spec/riscv/cpu.h>
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#include <spec/riscv/translation_table.h>
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#include <spec/riscv/timer.h>
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namespace Board { using namespace Hw::Riscv_board; }
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/* base-hw Core includes */
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#include <spec/riscv/timer.h>
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#endif /* _CORE__SPEC__RISCV_QEMU__BOARD_H_ */
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@ -21,9 +21,7 @@
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/* base-hw Core includes */
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#include <spec/arm/bcm2835_pic.h>
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#include <spec/arm/bcm2835_system_timer.h>
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#include <spec/arm/address_space_id_allocator.h>
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#include <spec/arm_v6/cpu.h>
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#include <spec/arm_v6/translation_table.h>
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namespace Board { using namespace Hw::Rpi_board; };
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@ -20,9 +20,7 @@
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/* base-hw Core includes */
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#include <spec/arm/bcm2837_pic.h>
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#include <spec/arm/generic_timer.h>
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#include <spec/arm_v8/address_space_id_allocator.h>
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#include <spec/arm_v8/cpu.h>
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#include <spec/arm_v8/translation_table.h>
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namespace Board {
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@ -22,9 +22,7 @@
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/* base-hw Core includes */
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#include <spec/arm/imx_epit.h>
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#include <spec/arm/trustzone_board.h>
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#include <spec/arm/address_space_id_allocator.h>
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#include <spec/cortex_a8/cpu.h>
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#include <spec/cortex_a8/translation_table.h>
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namespace Board { using namespace Hw::Usb_armory_board; }
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@ -26,9 +26,7 @@
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/* base-hw Core includes */
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#include <spec/arm/virtualization/board.h>
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#include <spec/arm/address_space_id_allocator.h>
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#include <spec/cortex_a15/cpu.h>
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#include <spec/cortex_a15/translation_table.h>
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namespace Kernel { class Cpu; }
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@ -27,9 +27,7 @@
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/* base-hw Core includes */
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#include <kernel/configuration.h>
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#include <kernel/irq.h>
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#include <spec/arm_v8/address_space_id_allocator.h>
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#include <spec/arm_v8/cpu.h>
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#include <spec/arm_v8/translation_table.h>
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namespace Board {
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@ -21,9 +21,7 @@
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/* base-hw Core includes */
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#include <spec/arm/cortex_a9_private_timer.h>
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#include <spec/arm/address_space_id_allocator.h>
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#include <spec/cortex_a9/cpu.h>
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#include <spec/cortex_a9/translation_table.h>
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namespace Board {
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@ -22,9 +22,7 @@
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/* base-hw Core includes */
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#include <spec/arm/cortex_a9_private_timer.h>
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#include <spec/arm/address_space_id_allocator.h>
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#include <spec/cortex_a9/cpu.h>
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#include <spec/cortex_a9/translation_table.h>
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namespace Board {
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@ -15,8 +15,9 @@
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#ifndef _CORE__SPEC__ARM_V6__CPU_H_
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#define _CORE__SPEC__ARM_V6__CPU_H_
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/* core includes */
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/* base-hw Core includes */
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#include <spec/arm/cpu_support.h>
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#include <spec/arm_v6/translation_table.h>
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namespace Genode { struct Cpu; }
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@ -14,12 +14,20 @@
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#ifndef _CORE__SPEC__ARM_V8__CPU_H_
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#define _CORE__SPEC__ARM_V8__CPU_H_
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/* Genode includes */
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/* base includes */
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#include <util/register.h>
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#include <cpu/cpu_state.h>
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/* base internal includes */
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#include <base/internal/align_at.h>
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/* base-hw internal includes */
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#include <hw/spec/arm_64/cpu.h>
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/* base-hw Core includes */
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#include <spec/arm_v8/address_space_id_allocator.h>
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#include <spec/arm_v8/translation_table.h>
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namespace Kernel { struct Thread_fault; }
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#ifndef _CORE__SPEC__CORTEX_A15__CPU_H_
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#define _CORE__SPEC__CORTEX_A15__CPU_H_
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/* core includes */
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/* base-hw Core includes */
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#include <spec/arm_v7/cpu_support.h>
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#include <spec/cortex_a15/translation_table.h>
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namespace Genode { class Cpu; }
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#ifndef _CORE__SPEC__CORTEX_A8__CPU_H_
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#define _CORE__SPEC__CORTEX_A8__CPU_H_
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/* core includes */
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/* base-hw Core includes */
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#include <spec/arm_v7/cpu_support.h>
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#include <spec/cortex_a8/translation_table.h>
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namespace Genode { using Cpu = Arm_v7_cpu; }
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#include <hw/spec/arm/page_table.h>
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/* base-hw Core includes */
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#include <kernel/interface.h>
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#include <spec/arm/cpu_support.h>
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constexpr unsigned Hw::Page_table::Descriptor_base::_device_tex() {
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@ -38,7 +38,7 @@ void Hw::Page_table::_table_changed(unsigned long addr, unsigned long size)
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* page table entry is added. We only do this as core as the kernel
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* adds translations solely before MMU and caches are enabled.
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*/
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Genode::Cpu::cache_clean_data_region(addr, size);
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Genode::Arm_cpu::cache_clean_data_region(addr, size);
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}
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#endif /* _CORE__SPEC__CORTEX_A8__TRANSLATION_TABLE_H_ */
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/* base-hw Core includes */
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#include <spec/arm_v7/cpu_support.h>
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#include <spec/cortex_a9/translation_table.h>
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namespace Genode { struct Cpu; }
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#ifndef _CORE__SPEC__RISCV__CPU_H_
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#define _CORE__SPEC__RISCV__CPU_H_
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/* Genode includes */
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/* base includes */
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#include <base/stdint.h>
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#include <cpu/cpu_state.h>
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#include <util/register.h>
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/* base internal includes */
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#include <base/internal/align_at.h>
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#include <kernel/interface.h>
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/* base-hw internal includes */
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#include <hw/spec/riscv/cpu.h>
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#include <hw/spec/riscv/page_table.h>
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/* base-hw Core includes */
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#include <kernel/interface.h>
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#include <spec/riscv/address_space_id_allocator.h>
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namespace Kernel { struct Thread_fault; }
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@ -101,4 +107,12 @@ class Genode::Cpu : public Hw::Riscv_cpu
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bool changed_cache_properties);
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};
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template <typename E, unsigned B, unsigned S>
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void Sv39::Level_x_translation_table<E, B, S>::_translation_added(addr_t, size_t)
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{
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Genode::Cpu::sfence();
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}
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#endif /* _CORE__SPEC__RISCV__CPU_H_ */
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#include <base/stdint.h>
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#include <kernel/types.h>
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/* base-hw internal includes */
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#include <hw/spec/riscv/qemu_board.h>
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namespace Board { class Timer; }
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@ -27,8 +30,8 @@ namespace Board { class Timer; }
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struct Board::Timer
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{
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enum {
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TICKS_PER_MS = TIMER_HZ / 1000,
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TICKS_PER_US = TICKS_PER_MS / 1000,
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TICKS_PER_MS = Hw::Riscv_board::TIMER_HZ / 1000,
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TICKS_PER_US = TICKS_PER_MS / 1000,
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};
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Kernel::time_t last_time { 0 };
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/*
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* \brief RISCV Sv39 page table format
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* \author Sebastian Sumpf
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* \date 2015-08-04
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*/
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/*
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* Copyright (C) 2015-2017 Genode Labs GmbH
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*
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* This file is part of the Genode OS framework, which is distributed
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* under the terms of the GNU Affero General Public License version 3.
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*/
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#ifndef _CORE__SPEC__RISCV__TRANSLATION_TABLE_H_
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#define _CORE__SPEC__RISCV__TRANSLATION_TABLE_H_
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#include <hw/spec/riscv/page_table.h>
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#include <cpu.h>
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template <typename E, unsigned B, unsigned S>
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void Sv39::Level_x_translation_table<E, B, S>::_translation_added(addr_t, size_t)
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{
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Genode::Cpu::sfence();
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}
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#endif /* _CORE__SPEC__RISCV__TRANSLATION_TABLE_H_ */
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#ifndef _CORE__SPEC__X86_64__CPU_H_
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#define _CORE__SPEC__X86_64__CPU_H_
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/* Genode includes */
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/* base includes */
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#include <util/register.h>
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#include <kernel/interface_support.h>
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#include <cpu/cpu_state.h>
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/* base-hw internal includes */
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#include <hw/spec/x86_64/cpu.h>
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/* base includes */
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/* base internal includes */
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#include <base/internal/align_at.h>
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/* core includes */
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#include <fpu.h>
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/* base-hw Core includes */
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#include <spec/x86_64/fpu.h>
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#include <spec/x86_64/address_space_id_allocator.h>
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#include <spec/x86_64/translation_table.h>
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namespace Kernel { struct Thread_fault; }
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