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imx31: remove platform completely (fix #1360)
This commit is contained in:
Stefan Kalkowski
Christian Helmuth
parent
0f18ecc142
commit
901bff813d
@ -16,10 +16,7 @@ For further target specific informations, have a look at
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'<GENODE_DIR>/repos/base-hw/doc/<TARGET>.txt' where '<TARGET>'
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'<GENODE_DIR>/repos/base-hw/doc/<TARGET>.txt' where '<TARGET>'
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is one of the following:
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is one of the following:
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'pbxa9' - Realview PBXA9
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'panda' - PandaBoard A2
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'vea9x4' - Versatile Express A9X4
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'imx31' - Freescale i.MX31
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'panda' - PandaBoard A2
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Prerequisites
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Prerequisites
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@ -61,10 +58,14 @@ build directory you want to create, and the hardware target to run Genode on.
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Where '<TARGET>' is one of the following, depending on the hardware system
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Where '<TARGET>' is one of the following, depending on the hardware system
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you aim at:
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you aim at:
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'pbxa9' - Realview PBXA9
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'arndale' - Arndale (Exynos5) board
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'vea9x4' - Versatile Express A9X4
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'imx53' - i.MX53 based board
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'imx31' - Freescale i.MX31
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'imx53_tz' - i.MX53 based board using TrustZone
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'panda' - PandaBoard A2
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'odroid_xu' - Odroid XU (Exynos5) board
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'panda' - PandaBoard A2
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'pbxa9' - Realview PBXA9
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'rpi' - Raspberry PI
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'vea9x4' - Versatile Express A9X4
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Please notice that not all of these targets might be emulateable with Qemu.
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Please notice that not all of these targets might be emulateable with Qemu.
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To be on the safe side use 'pbxa9'. For informations about how to boot
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To be on the safe side use 'pbxa9'. For informations about how to boot
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@ -1,92 +0,0 @@
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==================================================
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Getting started with 'base-hw' on Freescale i.MX31
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==================================================
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Martin Stein
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Abstract
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########
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This is a short tutorial that depicts a handy way to get a Genode ELF-image,
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build with 'base-hw', started on the Freescale i.MX31. For informations
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about how to build Genode images with 'base-hw', have a look at
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'<GENODE_DIR>/repos/base-hw/doc/hw.txt'. This tutorial is dedicated to common
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Linux systems, but all examples originate from a Ubuntu 11.10.
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Tutorial
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########
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Connect the i.MX31 to your local Ethernet through its RJ45 connector.
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Additionally connect the i.MX31 to your machine through its COM port.
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We use the bootloader that is installed on the board by the manufacturer, it's
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the LogicLoader by Logic Product Development, Version 2.3.5-IMX31_10 0001.
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Now install the following packages to communicate with the i.MX31:
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! apt-get install tftp-hpa minicom
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Open '/etc/default/tftpd-hpa' with a text editor and ensure that it has
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the following content:
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! TFTP_USERNAME="tftp"
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! TFTP_DIRECTORY="/var/lib/tftpboot"
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! TFTP_ADDRESS="0.0.0.0:69"
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! TFTP_OPTIONS="-l"
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Tell TFTP wich image to provide:
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! cd /var/lib/tftpboot/
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! ln -s <GENODE_BOOT_ELF> image.elf
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Where '<GENODE_BOOT_ELF>' is the absolute path of the targeted ELF image.
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Start TFTP to enable the upload of the image:
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! service tftp-hpa restart
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Precautionary determine the inet address of your TFTP machine:
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! ifconfig
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Start Minicom in configuration mode:
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! minicom -s
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Go to 'Serial port setting' and ensure that the device is set to the
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TTY of the COM port you've conntected the i.MX31 with. In my case it was
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'/dev/ttyS0'. Configure the other settings for a baud rate of '115200',
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8 bit char length, no parity and 1 stop bit. Quit Minicom and start
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it once more in a dedicated terminal:
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! minicom
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Plug in the i.MX31 power connector or push the 'S1' button if the i.MX31 is
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already powered. Minicom should now show the following message below some
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bootloader info:
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! losh>
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We have to start DHCP first, so in the Minicom console type:
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! ifconfig sm0 dhcp
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Wait until DHCP is started:
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! Starting DHCP on sm0 ...
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! losh>
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Then load the Genode image:
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! load elf /tftp/<INET_ADDR>:/var/lib/tftpboot/image.elf
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Where '<INET_ADDR>' is the inet address of your TFTP machine.
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To execute the loaded image type:
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! exec start
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Now your Genode scenario should start and offer its debug output
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in Minicom. You can boot other images by redirecting the link
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'/var/lib/tftpboot/image.elf' accordingly, restarting your i.MX31
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and instructing LogicLoader again as described above.
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@ -1,16 +0,0 @@
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#
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# \brief Build config for Genodes core process
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# \author Martin Stein
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# \date 2012-10-04
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#
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# add include paths
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INC_DIR += $(REP_DIR)/src/core/include/spec/imx31
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INC_DIR += $(REP_DIR)/src/core/include/spec/imx
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# add C++ sources
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SRC_CC += platform_services.cc
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SRC_CC += spec/imx31/platform_support.cc
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# include less specific configuration
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include $(REP_DIR)/lib/mk/arm_v6/core.inc
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@ -1,18 +0,0 @@
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#
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# \brief Build configurations for 'base-hw' on Freescale i.MX31
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# \author Martin Stein
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# \date 2011-12-20
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#
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# denote wich specs are also fullfilled by this spec
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SPECS += hw platform_imx31 epit
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# configure multiprocessor mode
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NR_OF_CPUS = 1
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# set address where to link the text segment at
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LD_TEXT_ADDR ?= 0x82000000
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# include implied specs
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include $(call select_from_repositories,mk/spec-hw.mk)
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include $(call select_from_repositories,mk/spec-platform_imx31.mk)
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@ -18,14 +18,14 @@
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#include <board.h>
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#include <board.h>
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/* Genode includes */
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/* Genode includes */
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#include <drivers/uart/imx31_uart_base.h>
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#include <drivers/uart/imx_uart_base.h>
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namespace Genode
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namespace Genode
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{
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{
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/**
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/**
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* Serial output driver for core
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* Serial output driver for core
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*/
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*/
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class Serial : public Imx31_uart_base
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class Serial : public Imx_uart_base
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{
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{
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public:
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public:
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@ -34,7 +34,7 @@ namespace Genode
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*
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*
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* XXX: The 'baud_rate' argument is ignored for now.
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* XXX: The 'baud_rate' argument is ignored for now.
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*/
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*/
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Serial(unsigned) : Imx31_uart_base(Board::UART_1_MMIO_BASE) { }
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Serial(unsigned) : Imx_uart_base(Board::UART_1_MMIO_BASE) { }
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};
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};
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}
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}
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@ -1,102 +0,0 @@
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/*
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* \brief Board driver for core
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* \author Martin Stein
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* \date 2012-11-01
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*/
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#ifndef _BOARD_H_
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#define _BOARD_H_
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/* Genode includes */
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#include <drivers/board_base.h>
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namespace Genode
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{
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/**
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* AHB-lite 2v6 to IP bus interface
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*/
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class Aips : public Mmio
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{
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/**
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* Configuration of the masters
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*/
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struct Mpr { enum { ALL_UNBUFFERED_AND_FULLY_TRUSTED = 0x77777777 }; };
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struct Mpr1 : Register<0x0, 32>, Mpr { };
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struct Mpr2 : Register<0x4, 32>, Mpr { };
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/**
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* Configuration of the platform peripherals
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*/
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struct Pacr { enum { ALL_UNBUFFERED_AND_FULLY_UNPROTECTED = 0 }; };
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struct Pacr1 : Register<0x20, 32>, Pacr { };
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struct Pacr2 : Register<0x24, 32>, Pacr { };
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struct Pacr3 : Register<0x28, 32>, Pacr { };
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struct Pacr4 : Register<0x2c, 32>, Pacr { };
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/**
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* Configuration of the off-platform peripherals
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*/
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struct Opacr1 : Register<0x40, 32>, Pacr { };
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struct Opacr2 : Register<0x44, 32>, Pacr { };
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struct Opacr3 : Register<0x48, 32>, Pacr { };
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struct Opacr4 : Register<0x4c, 32>, Pacr { };
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struct Opacr5 : Register<0x50, 32>, Pacr { };
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public:
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/**
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* Constructor
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*/
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Aips(addr_t const base) : Mmio(base) { }
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/**
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* Configure this module appropriately for the first kernel run
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*/
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void prepare_kernel()
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{
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/* avoid AIPS intervention at any memory access */
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write<Mpr1>(Mpr::ALL_UNBUFFERED_AND_FULLY_TRUSTED);
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write<Mpr2>(Mpr::ALL_UNBUFFERED_AND_FULLY_TRUSTED);
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write<Pacr1>(Pacr::ALL_UNBUFFERED_AND_FULLY_UNPROTECTED);
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write<Pacr2>(Pacr::ALL_UNBUFFERED_AND_FULLY_UNPROTECTED);
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write<Pacr3>(Pacr::ALL_UNBUFFERED_AND_FULLY_UNPROTECTED);
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write<Pacr4>(Pacr::ALL_UNBUFFERED_AND_FULLY_UNPROTECTED);
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write<Opacr1>(Pacr::ALL_UNBUFFERED_AND_FULLY_UNPROTECTED);
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write<Opacr2>(Pacr::ALL_UNBUFFERED_AND_FULLY_UNPROTECTED);
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write<Opacr3>(Pacr::ALL_UNBUFFERED_AND_FULLY_UNPROTECTED);
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write<Opacr4>(Pacr::ALL_UNBUFFERED_AND_FULLY_UNPROTECTED);
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write<Opacr5>(Pacr::ALL_UNBUFFERED_AND_FULLY_UNPROTECTED);
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}
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};
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/**
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* Board driver for core
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*/
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struct Board : Board_base
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{
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/**
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* Static AIPS 1 instance
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*/
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static Aips * aips_1() { static Aips a(AIPS_1_MMIO_BASE); return &a; }
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/**
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* Static AIPS 2 instance
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*/
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static Aips * aips_2() { static Aips a(AIPS_2_MMIO_BASE); return &a; }
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/**
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* Configure this module appropriately for the first kernel run
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*/
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static void prepare_kernel()
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{
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aips_1()->prepare_kernel();
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aips_2()->prepare_kernel();
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}
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static void outer_cache_invalidate() { }
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static void outer_cache_flush() { }
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static bool is_smp() { return false; }
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};
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}
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#endif /* _BOARD_H_ */
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@ -1,115 +0,0 @@
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/*
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* \brief Programmable interrupt controller for core
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* \author Martin Stein
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* \date 2012-04-23
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*/
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/*
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* Copyright (C) 2012-2013 Genode Labs GmbH
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*
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* This file is part of the Genode OS framework, which is distributed
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* under the terms of the GNU General Public License version 2.
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*/
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#ifndef _PIC_H_
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#define _PIC_H_
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namespace Genode
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{
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/**
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* Programmable interrupt controller for core
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*/
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class Pic;
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}
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class Genode::Pic : public Mmio
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{
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private:
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struct Intcntl : Register<0x0, 32> { }; /* IRQ control register */
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struct Nimask : Register<0x4, 32> { }; /* normal IRQ mask reg. */
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struct Intennum : Register<0x8, 32> { }; /* IRQ enable nr. reg. */
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struct Intdisnum : Register<0xc, 32> { }; /* IRQ disable nr. reg. */
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struct Intenableh : Register<0x10, 32> { }; /* IRQ enable register */
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struct Intenablel : Register<0x14, 32> { }; /* IRQ enable register */
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struct Inttypeh : Register<0x18, 32> { }; /* IRQ type register */
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struct Inttypel : Register<0x1c, 32> { }; /* IRQ type register */
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struct Intsrch : Register<0x48, 32> { }; /* IRQ source register */
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struct Intsrcl : Register<0x4c, 32> { }; /* IRQ source register */
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struct Nipndh : Register<0x58, 32> { }; /* normal IRQ pending */
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struct Nipndl : Register<0x5c, 32> { }; /* normal IRQ pending */
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/**
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* Normal interrupt priority registers
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*/
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struct Nipriority : Register_array<0x20, 32, 8, 32> { };
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/**
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* Normal interrupt vector and status register
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*/
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struct Nivecsr : Register<0x40, 32>
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{
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struct Nvector : Bitfield<16, 16> { };
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};
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/**
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* Validate request number 'i'
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*/
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bool _valid(unsigned const i) const { return i < NR_OF_IRQ; }
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public:
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enum { NR_OF_IRQ = 64 };
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/**
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* Constructor
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*/
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Pic() : Mmio(Board::AVIC_MMIO_BASE)
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{
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write<Intenablel>(0);
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write<Intenableh>(0);
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write<Nimask>(~0);
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write<Intcntl>(0);
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write<Inttypeh>(0);
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write<Inttypel>(0);
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for (unsigned i = 0; i < Nipriority::ITEMS; i++) {
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write<Nipriority>(0, i); }
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}
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/**
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* Try to receive an IRQ in 'i' and return wether it was successful
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*/
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bool take_request(unsigned & i)
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{
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i = read<Nivecsr::Nvector>();
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return _valid(i);
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}
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/**
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* Unmask IRQ 'i'
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*/
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void unmask(unsigned const i, unsigned) {
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if (_valid(i)) { write<Intennum>(i); } }
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/**
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* Mask IRQ 'i'
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*/
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|
||||||
void mask(unsigned const i) { if (i < NR_OF_IRQ) write<Intdisnum>(i); }
|
|
||||||
|
|
||||||
/**
|
|
||||||
* Return wether IRQ 'irq_id' is inter-processor IRQ of CPU 'cpu_id'
|
|
||||||
*/
|
|
||||||
bool is_ip_interrupt(unsigned, unsigned) { return false; }
|
|
||||||
|
|
||||||
/*************
|
|
||||||
** Dummies **
|
|
||||||
*************/
|
|
||||||
|
|
||||||
void init_cpu_local() { }
|
|
||||||
void trigger_ip_interrupt(unsigned) { }
|
|
||||||
void finish_request() { /* done by source retraction or masking */ }
|
|
||||||
};
|
|
||||||
|
|
||||||
namespace Kernel { class Pic : public Genode::Pic { }; }
|
|
||||||
|
|
||||||
#endif /* _PIC_H_ */
|
|
||||||
@ -1,72 +0,0 @@
|
|||||||
/*
|
|
||||||
* \brief Platform implementations specific for base-hw and i.MX31
|
|
||||||
* \author Norman Feske
|
|
||||||
* \date 2012-08-30
|
|
||||||
*/
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Copyright (C) 2012-2013 Genode Labs GmbH
|
|
||||||
*
|
|
||||||
* This file is part of the Genode OS framework, which is distributed
|
|
||||||
* under the terms of the GNU General Public License version 2.
|
|
||||||
*/
|
|
||||||
|
|
||||||
/* core includes */
|
|
||||||
#include <platform.h>
|
|
||||||
#include <board.h>
|
|
||||||
#include <pic.h>
|
|
||||||
#include <cpu.h>
|
|
||||||
|
|
||||||
using namespace Genode;
|
|
||||||
|
|
||||||
Native_region * Platform::_ram_regions(unsigned const i)
|
|
||||||
{
|
|
||||||
static Native_region _regions[] =
|
|
||||||
{
|
|
||||||
{ Board::RAM_0_BASE, Board::RAM_0_SIZE }
|
|
||||||
};
|
|
||||||
return i < sizeof(_regions)/sizeof(_regions[0]) ? &_regions[i] : 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
Native_region * Platform::_mmio_regions(unsigned const i)
|
|
||||||
{
|
|
||||||
static Native_region _regions[] =
|
|
||||||
{
|
|
||||||
/*
|
|
||||||
* The address range below 0x30000000 is used for secure ROM, ROM, and
|
|
||||||
* internal RAM.
|
|
||||||
*/
|
|
||||||
{ 0x30000000, 0x50000000 },
|
|
||||||
/*
|
|
||||||
* The address range between 0x8000000 and 0x9fffffff is designated for
|
|
||||||
* SDRAM. The remaining address range is populated with peripherals.
|
|
||||||
*/
|
|
||||||
{ 0xa0000000, 0x24000000 }
|
|
||||||
};
|
|
||||||
return i < sizeof(_regions)/sizeof(_regions[0]) ? &_regions[i] : 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
Native_region * Platform::_core_only_mmio_regions(unsigned const i)
|
|
||||||
{
|
|
||||||
static Native_region _regions[] =
|
|
||||||
{
|
|
||||||
/* core UART */
|
|
||||||
{ Board::UART_1_MMIO_BASE, Board::UART_1_MMIO_SIZE },
|
|
||||||
|
|
||||||
/* core timer */
|
|
||||||
{ Board::EPIT_1_MMIO_BASE, Board::EPIT_1_MMIO_SIZE },
|
|
||||||
|
|
||||||
/* interrupt controller */
|
|
||||||
{ Board::AVIC_MMIO_BASE, Board::AVIC_MMIO_SIZE },
|
|
||||||
|
|
||||||
/* bus interface controller */
|
|
||||||
{ Board::AIPS_1_MMIO_BASE, Board::AIPS_1_MMIO_SIZE },
|
|
||||||
{ Board::AIPS_2_MMIO_BASE, Board::AIPS_2_MMIO_SIZE },
|
|
||||||
};
|
|
||||||
return i < sizeof(_regions)/sizeof(_regions[0]) ? &_regions[i] : 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
Cpu::User_context::User_context() { cpsr = Psr::init_user(); }
|
|
||||||
@ -1,5 +1,5 @@
|
|||||||
/*
|
/*
|
||||||
* \brief Driver base for i.MX31 UART-module
|
* \brief Driver base for Freescale's i.MX UART-module
|
||||||
* \author Norman Feske
|
* \author Norman Feske
|
||||||
* \author Martin Stein
|
* \author Martin Stein
|
||||||
* \date 2012-08-30
|
* \date 2012-08-30
|
||||||
@ -12,8 +12,8 @@
|
|||||||
* under the terms of the GNU General Public License version 2.
|
* under the terms of the GNU General Public License version 2.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#ifndef _INCLUDE__DRIVERS__UART__IMX31_UART_BASE_H_
|
#ifndef _INCLUDE__DRIVERS__UART__IMX_UART_BASE_H_
|
||||||
#define _INCLUDE__DRIVERS__UART__IMX31_UART_BASE_H_
|
#define _INCLUDE__DRIVERS__UART__IMX_UART_BASE_H_
|
||||||
|
|
||||||
/* Genode includes */
|
/* Genode includes */
|
||||||
#include <util/mmio.h>
|
#include <util/mmio.h>
|
||||||
@ -21,9 +21,9 @@
|
|||||||
namespace Genode
|
namespace Genode
|
||||||
{
|
{
|
||||||
/**
|
/**
|
||||||
* Driver base for i.MX31 UART-module
|
* Driver base for i.MX UART-module
|
||||||
*/
|
*/
|
||||||
class Imx31_uart_base : Mmio
|
class Imx_uart_base : Mmio
|
||||||
{
|
{
|
||||||
/**
|
/**
|
||||||
* Control register 1
|
* Control register 1
|
||||||
@ -245,7 +245,7 @@ namespace Genode
|
|||||||
*
|
*
|
||||||
* \param base device MMIO base
|
* \param base device MMIO base
|
||||||
*/
|
*/
|
||||||
explicit Imx31_uart_base(addr_t const base) : Mmio(base)
|
explicit Imx_uart_base(addr_t const base) : Mmio(base)
|
||||||
{
|
{
|
||||||
write<Cr1>(Cr1::init_value());
|
write<Cr1>(Cr1::init_value());
|
||||||
write<Cr2>(Cr2::init_value());
|
write<Cr2>(Cr2::init_value());
|
||||||
@ -270,5 +270,5 @@ namespace Genode
|
|||||||
};
|
};
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* _INCLUDE__DRIVERS__UART__IMX31_UART_BASE_H_ */
|
#endif /* _INCLUDE__DRIVERS__UART__IMX_UART_BASE_H_ */
|
||||||
|
|
||||||
@ -1,63 +0,0 @@
|
|||||||
/*
|
|
||||||
* \brief Board definitions for the i.MX31
|
|
||||||
* \author Martin Stein
|
|
||||||
* \author Norman Feske
|
|
||||||
* \date 2011-11-03
|
|
||||||
*/
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Copyright (C) 2012-2013 Genode Labs GmbH
|
|
||||||
*
|
|
||||||
* This file is part of the Genode OS framework, which is distributed
|
|
||||||
* under the terms of the GNU General Public License version 2.
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifndef _INCLUDE__PLATFORM__BOARD_BASE_H_
|
|
||||||
#define _INCLUDE__PLATFORM__BOARD_BASE_H_
|
|
||||||
|
|
||||||
/* Genode includes */
|
|
||||||
#include <util/mmio.h>
|
|
||||||
|
|
||||||
namespace Genode
|
|
||||||
{
|
|
||||||
/**
|
|
||||||
* i.MX31 motherboard
|
|
||||||
*/
|
|
||||||
struct Board_base
|
|
||||||
{
|
|
||||||
enum {
|
|
||||||
RAM_0_BASE = 0x80000000,
|
|
||||||
RAM_0_SIZE = 0x20000000,
|
|
||||||
|
|
||||||
MMIO_0_BASE = 0x30000000,
|
|
||||||
MMIO_0_SIZE = 0x50000000,
|
|
||||||
|
|
||||||
UART_1_IRQ = 45,
|
|
||||||
UART_1_MMIO_BASE = 0x43f90000,
|
|
||||||
UART_1_MMIO_SIZE = 0x00004000,
|
|
||||||
|
|
||||||
EPIT_1_IRQ = 28,
|
|
||||||
EPIT_1_MMIO_BASE = 0x53f94000,
|
|
||||||
EPIT_1_MMIO_SIZE = 0x00004000,
|
|
||||||
|
|
||||||
EPIT_2_IRQ = 27,
|
|
||||||
EPIT_2_MMIO_BASE = 0x53f98000,
|
|
||||||
EPIT_2_MMIO_SIZE = 0x00004000,
|
|
||||||
|
|
||||||
AVIC_MMIO_BASE = 0x68000000,
|
|
||||||
AVIC_MMIO_SIZE = 0x04000000,
|
|
||||||
|
|
||||||
AIPS_1_MMIO_BASE = 0x43F00000,
|
|
||||||
AIPS_1_MMIO_SIZE = 0x00004000,
|
|
||||||
|
|
||||||
AIPS_2_MMIO_BASE = 0x53F00000,
|
|
||||||
AIPS_2_MMIO_SIZE = 0x00004000,
|
|
||||||
|
|
||||||
/* CPU cache */
|
|
||||||
CACHE_LINE_SIZE_LOG2 = 2, /* FIXME get correct value from board spec */
|
|
||||||
};
|
|
||||||
};
|
|
||||||
}
|
|
||||||
|
|
||||||
#endif /* _INCLUDE__PLATFORM__BOARD_BASE_H_ */
|
|
||||||
|
|
||||||
@ -1,15 +0,0 @@
|
|||||||
#
|
|
||||||
# \brief Build-system configurations for Freescale i.MX31
|
|
||||||
# \author Martin Stein
|
|
||||||
# \date 2012-09-26
|
|
||||||
#
|
|
||||||
|
|
||||||
# denote wich specs are also fullfilled by this spec
|
|
||||||
SPECS += arm_v6
|
|
||||||
|
|
||||||
# add repository relative include paths
|
|
||||||
REP_INC_DIR += include/platform/imx31
|
|
||||||
|
|
||||||
# include implied specs
|
|
||||||
include $(call select_from_repositories,mk/spec-arm_v6.mk)
|
|
||||||
|
|
||||||
@ -1 +0,0 @@
|
|||||||
REPOSITORIES += $(GENODE_DIR)/repos/base-hw
|
|
||||||
@ -30,7 +30,6 @@ usage:
|
|||||||
@echo " 'hw_panda'"
|
@echo " 'hw_panda'"
|
||||||
@echo " 'hw_vea9x4'"
|
@echo " 'hw_vea9x4'"
|
||||||
@echo " 'hw_pbxa9'"
|
@echo " 'hw_pbxa9'"
|
||||||
@echo " 'hw_imx31'"
|
|
||||||
@echo " 'hw_imx53'"
|
@echo " 'hw_imx53'"
|
||||||
@echo " 'hw_imx53_tz'"
|
@echo " 'hw_imx53_tz'"
|
||||||
@echo " 'hw_arndale'"
|
@echo " 'hw_arndale'"
|
||||||
@ -218,9 +217,6 @@ hw_vea9x4::
|
|||||||
hw_panda::
|
hw_panda::
|
||||||
@echo "SPECS = genode hw_panda" > $(BUILD_DIR)/etc/specs.conf
|
@echo "SPECS = genode hw_panda" > $(BUILD_DIR)/etc/specs.conf
|
||||||
|
|
||||||
hw_imx31::
|
|
||||||
@echo "SPECS = genode hw_imx31" > $(BUILD_DIR)/etc/specs.conf
|
|
||||||
|
|
||||||
hw_imx53::
|
hw_imx53::
|
||||||
@echo "SPECS = genode hw_imx53" > $(BUILD_DIR)/etc/specs.conf
|
@echo "SPECS = genode hw_imx53" > $(BUILD_DIR)/etc/specs.conf
|
||||||
|
|
||||||
|
|||||||
Loading…
x
Reference in New Issue
Block a user