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hw: re-enable the L2 cache for i.MX53 (Ref #1194)
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@ -78,13 +78,6 @@ namespace Imx53
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struct Board : Genode::Board_base
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{
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static void disable_l2_cache()
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{
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asm volatile ("mrc p15, 0, r0, c1, c0, 1 \n"
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"bic r0, r0, #2 \n"
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"mcr p15, 0, r0, c1, c0, 1" ::: "r0" );
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}
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/**
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* static AIPS 1 instance
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*/
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@ -100,8 +93,6 @@ namespace Imx53
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*/
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static void prepare_kernel()
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{
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disable_l2_cache();
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aips_1()->prepare_kernel();
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aips_2()->prepare_kernel();
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}
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