From 8c460b3ea5a8745b3b7b336b4095f9fac13cd763 Mon Sep 17 00:00:00 2001 From: Stefan Kalkowski Date: Fri, 21 Sep 2018 13:09:59 +0200 Subject: [PATCH] hw: enable l2-cache on Wandboard Quad (fix #1807) --- .../src/bootstrap/spec/arm/cortex_a9_actlr.h | 10 +++- .../base-hw/src/bootstrap/spec/panda/board.h | 18 +++--- .../src/bootstrap/spec/wand_quad/board.h | 49 ++++++++++++++- repos/base-hw/src/lib/hw/spec/arm/pl310.h | 59 ++++++++++++++++--- 4 files changed, 117 insertions(+), 19 deletions(-) diff --git a/repos/base-hw/src/bootstrap/spec/arm/cortex_a9_actlr.h b/repos/base-hw/src/bootstrap/spec/arm/cortex_a9_actlr.h index 8b5777ce71..b2d49f1f8d 100644 --- a/repos/base-hw/src/bootstrap/spec/arm/cortex_a9_actlr.h +++ b/repos/base-hw/src/bootstrap/spec/arm/cortex_a9_actlr.h @@ -20,11 +20,19 @@ namespace Bootstrap { struct Actlr; } struct Bootstrap::Actlr : Bootstrap::Cpu::Actlr { - struct Smp : Bitfield<6, 1> { }; + struct Fw : Bitfield<0, 1> { }; + struct L2_prefetch_enable : Bitfield<1, 1> { }; + struct L1_prefetch_enable : Bitfield<2, 1> { }; + struct Write_full_line : Bitfield<3, 1> { }; + struct Smp : Bitfield<6, 1> { }; static void enable_smp() { auto v = read(); + Fw::set(v, 1); + L1_prefetch_enable::set(v, 1); + L2_prefetch_enable::set(v, 1); + Write_full_line::set(v, 1); Smp::set(v, 1); write(v); } diff --git a/repos/base-hw/src/bootstrap/spec/panda/board.h b/repos/base-hw/src/bootstrap/spec/panda/board.h index f6fb7d6f28..4f0b831893 100644 --- a/repos/base-hw/src/bootstrap/spec/panda/board.h +++ b/repos/base-hw/src/bootstrap/spec/panda/board.h @@ -56,15 +56,15 @@ class Board::L2_cache : Hw::Pl310 unsigned long _init_value() { Aux::access_t v = 0; - Aux::Associativity::set(v, 1); - Aux::Way_size::set(v, 3); - Aux::Share_override::set(v, 1); - Aux::Reserved::set(v, 1); - Aux::Ns_lockdown::set(v, 1); - Aux::Ns_irq_ctrl::set(v, 1); - Aux::Data_prefetch::set(v, 1); - Aux::Inst_prefetch::set(v, 1); - Aux::Early_bresp::set(v, 1); + Aux::Associativity::set(v, Aux::Associativity::WAY_16); + Aux::Way_size::set(v, Aux::Way_size::KB_64); + Aux::Share_override::set(v, true); + Aux::Replacement_policy::set(v, Aux::Replacement_policy::PRAND); + Aux::Ns_lockdown::set(v, true); + Aux::Ns_irq_ctrl::set(v, true); + Aux::Data_prefetch::set(v, true); + Aux::Inst_prefetch::set(v, true); + Aux::Early_bresp::set(v, true); return v; } diff --git a/repos/base-hw/src/bootstrap/spec/wand_quad/board.h b/repos/base-hw/src/bootstrap/spec/wand_quad/board.h index 3a6d06d6fd..bc84fda6fe 100644 --- a/repos/base-hw/src/bootstrap/spec/wand_quad/board.h +++ b/repos/base-hw/src/bootstrap/spec/wand_quad/board.h @@ -28,7 +28,7 @@ namespace Board { using namespace Wand_quad; - using L2_cache = Hw::Pl310; + struct L2_cache; using Cpu_mmio = Hw::Cortex_a9_mmio; using Serial = Genode::Imx_uart; @@ -38,4 +38,51 @@ namespace Board { }; } +struct Board::L2_cache : Hw::Pl310 +{ + L2_cache(Genode::addr_t mmio) : Hw::Pl310(mmio) + { + Aux::access_t aux = 0; + Aux::Full_line_of_zero::set(aux, true); + Aux::Associativity::set(aux, Aux::Associativity::WAY_16); + Aux::Way_size::set(aux, Aux::Way_size::KB_64); + Aux::Share_override::set(aux, true); + Aux::Replacement_policy::set(aux, Aux::Replacement_policy::PRAND); + Aux::Ns_lockdown::set(aux, true); + Aux::Data_prefetch::set(aux, true); + Aux::Inst_prefetch::set(aux, true); + Aux::Early_bresp::set(aux, true); + write(aux); + + Tag_ram::access_t tag_ram = 0; + Tag_ram::Setup_latency::set(tag_ram, 2); + Tag_ram::Read_latency::set(tag_ram, 3); + Tag_ram::Write_latency::set(tag_ram, 1); + write(tag_ram); + + Data_ram::access_t data_ram = 0; + Data_ram::Setup_latency::set(data_ram, 2); + Data_ram::Read_latency::set(data_ram, 3); + Data_ram::Write_latency::set(data_ram, 1); + write(data_ram); + + Prefetch_ctrl::access_t prefetch = 0; + Prefetch_ctrl::Data_prefetch::set(prefetch, 1); + Prefetch_ctrl::Inst_prefetch::set(prefetch, 1); + write(prefetch | 0xF); + } + + using Hw::Pl310::invalidate; + + void enable() + { + Pl310::mask_interrupts(); + write(1); + } + + void disable() { + write(0); + } +}; + #endif /* _SRC__BOOTSTRAP__SPEC__WAND_QUAD__BOARD_H_ */ diff --git a/repos/base-hw/src/lib/hw/spec/arm/pl310.h b/repos/base-hw/src/lib/hw/spec/arm/pl310.h index ac724a9087..2b0de01570 100644 --- a/repos/base-hw/src/lib/hw/spec/arm/pl310.h +++ b/repos/base-hw/src/lib/hw/spec/arm/pl310.h @@ -32,15 +32,52 @@ class Hw::Pl310 : public Genode::Mmio struct Aux : Register<0x104, 32> { - struct Associativity : Bitfield<16,1> { }; - struct Way_size : Bitfield<17,3> { }; + struct Full_line_of_zero : Bitfield<0,1> {}; + + struct Associativity : Bitfield<16,1> + { + enum { WAY_8, WAY_16 }; + }; + + struct Way_size : Bitfield<17,3> + { + enum { + RESERVED, + KB_16, + KB_32, + KB_64, + KB_128, + KB_256, + KB_512 + }; + }; + struct Share_override : Bitfield<22,1> { }; - struct Reserved : Bitfield<25,1> { }; - struct Ns_lockdown : Bitfield<26,1> { }; - struct Ns_irq_ctrl : Bitfield<27,1> { }; - struct Data_prefetch : Bitfield<28,1> { }; - struct Inst_prefetch : Bitfield<29,1> { }; - struct Early_bresp : Bitfield<30,1> { }; + + struct Replacement_policy : Bitfield<25,1> + { + enum { ROUND_ROBIN, PRAND }; + }; + + struct Ns_lockdown : Bitfield<26,1> { }; + struct Ns_irq_ctrl : Bitfield<27,1> { }; + struct Data_prefetch : Bitfield<28,1> { }; + struct Inst_prefetch : Bitfield<29,1> { }; + struct Early_bresp : Bitfield<30,1> { }; + }; + + struct Tag_ram : Register<0x108, 32> + { + struct Setup_latency : Bitfield<0,3> { }; + struct Read_latency : Bitfield<4,3> { }; + struct Write_latency : Bitfield<8,3> { }; + }; + + struct Data_ram : Register<0x10c, 32> + { + struct Setup_latency : Bitfield<0,3> { }; + struct Read_latency : Bitfield<4,3> { }; + struct Write_latency : Bitfield<8,3> { }; }; struct Irq_mask : Register <0x214, 32> { }; @@ -55,6 +92,12 @@ class Hw::Pl310 : public Genode::Mmio struct Dwb : Bitfield<1,1> { }; }; + struct Prefetch_ctrl : Register<0xf60, 32> + { + struct Data_prefetch : Bitfield<28,1> { }; + struct Inst_prefetch : Bitfield<29,1> { }; + }; + void _sync() { while (read()) ; } public: