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gpu/intel: do not clflush on MMIO but on ppgtt
Executing a clflush operation on MMIO memory freezes embedded platforms such as the Celeron N3450 used on the ZimaBlade. Looking into the current linux code confirms that clflush is only used for ppgtt entries and not on MMIO memory. Fixes #5176
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@ -21,7 +21,6 @@
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/* local includes */
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#include <types.h>
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#include <commands.h>
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#include <utils.h>
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namespace Igd {
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@ -727,8 +726,6 @@ class Igd::Hardware_status_page : public Igd::Common_context_regs<0x32*4 + 4>
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uint64_t sequence_number()
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{
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/* invalidates cache before reading */
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Utils::clflush((void *)(base() + Sequence_number::OFFSET));
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return read<Sequence_number>();
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}
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@ -947,8 +947,6 @@ struct Igd::Device
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return false;
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}
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ring.flush(tail, tail + advance);
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/* tail_offset must be specified in qword */
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rcs.with_context([&](auto &context) {
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context.tail_offset((offset % (rcs.ring_size())) / 8);
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@ -313,6 +313,7 @@ class Genode::Level_4_translation_table
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throw Invalid_address();
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func(vo, pa, sz, _entries[i]);
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Utils::clflush(&_entries[i]);
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/* check whether we wrap */
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if (end < vo) return;
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@ -535,6 +536,7 @@ class Genode::Page_directory
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throw Invalid_address();
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func(vo, pa, sz, _entries[i]);
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Utils::clflush(&_entries[i]);
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/* check whether we wrap */
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if (end < vo) { return; }
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@ -724,6 +726,7 @@ class Genode::Pml4_table
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throw Invalid_address();
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func(vo, pa, sz, _entries[i]);
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Utils::clflush(&_entries[i]);
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/* check whether we wrap */
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if (end < vo) { return; }
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@ -182,23 +182,6 @@ class Igd::Ring_buffer
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*/
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Index max() const { return _max; }
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/**
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* Flush range of commands in ring buffer
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*
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* \param from index to start from
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* \param to index to end on
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*/
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void flush(Index from, Index to) const
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{
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with_dwords([&](auto dwords) {
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uint32_t *start = dwords + from;
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for (Index i = 0; i < (to - from); i++) {
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uint32_t *addr = start++;
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Utils::clflush(addr);
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}
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});
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}
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/*********************
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** Debug interface **
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*********************/
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