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base: fix shift overflow error in Bitfield::mask()
Fixes genodelabs/genode#4249
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7618c9410a
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88b3880c77
@ -149,7 +149,15 @@ struct Genode::Register
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/**
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* Get an unshifted mask of this field
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*/
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static constexpr access_t mask() { return ((access_t)1 << WIDTH) - 1; }
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static constexpr access_t mask()
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{
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/* prevent compile error "left shift count >= width of type" */
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if (_WIDTH < _ACCESS_WIDTH) {
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return ((access_t)1 << _WIDTH) - 1;
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} else {
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return ~(access_t)0;
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}
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}
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/**
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* Get a mask of this field shifted by its shift in the register
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@ -69,6 +69,10 @@ struct Test_mmio : public Mmio
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struct Bits_2 : Bitfield<44,4> { };
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struct Bits_3 : Bitfield<0,24> { };
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struct Bits_4 : Bitfield<60,4> { };
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struct Bits_5 : Bitfield<0,64> { };
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struct Bits_6 : Bitfield<16,64> { };
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struct Bits_7 : Bitfield<12,90> { };
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struct Bits_8 : Bitfield<0,72> { };
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};
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struct Bitset_64_0 : Bitset_2<Reg_64::Bits_0, Reg_64::Bits_1> { };
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struct Bitset_64_1 : Bitset_3<Reg_64::Bits_4, Reg_64::Bits_3, Reg_64::Bits_2> { };
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@ -463,6 +467,44 @@ void Component::construct(Genode::Env &env)
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if (mmio.read<Reg::Bits_3>() != BITS_3) { failed(__LINE__, env); }
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if (compare_mem(mmio_mem, cmp_mem, MMIO_SIZE)) { failed(__LINE__, env); }
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/* test bitfields that are at least as wide as the register */
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{
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uint64_t const value_1 { 0x0123456789abcdef };
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uint64_t const value_2 { 0x0123456789abcdef };
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uint64_t const value_3 { 0x0123456789abcdef };
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zero_mem(mmio_mem, MMIO_SIZE);
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mmio.write<Reg::Bits_5>(value_1);
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if (mmio.read<Reg::Bits_5>() != value_2) { failed(__LINE__, env); }
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if (compare_mem(mmio_mem, (uint8_t *)&value_3, MMIO_SIZE)) { failed(__LINE__, env); }
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}
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{
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uint64_t const value_1 { 0x0123456789abcdef };
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uint64_t const value_2 { 0x0000456789abcdef };
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uint64_t const value_3 { 0x456789abcdef0000 };
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zero_mem(mmio_mem, MMIO_SIZE);
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mmio.write<Reg::Bits_6>(value_1);
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if (mmio.read<Reg::Bits_6>() != value_2) { failed(__LINE__, env); }
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if (compare_mem(mmio_mem, (uint8_t *)&value_3, MMIO_SIZE)) { failed(__LINE__, env); }
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}
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{
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uint64_t const value_1 { 0x0123456789abcdef };
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uint64_t const value_2 { 0x0003456789abcdef };
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uint64_t const value_3 { 0x3456789abcdef000 };
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zero_mem(mmio_mem, MMIO_SIZE);
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mmio.write<Reg::Bits_7>(value_1);
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if (mmio.read<Reg::Bits_7>() != value_2) { failed(__LINE__, env); }
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if (compare_mem(mmio_mem, (uint8_t *)&value_3, MMIO_SIZE)) { failed(__LINE__, env); }
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}
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{
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uint64_t const value_1 { 0x0123456789abcdef };
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uint64_t const value_2 { 0x0123456789abcdef };
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uint64_t const value_3 { 0x0123456789abcdef };
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zero_mem(mmio_mem, MMIO_SIZE);
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mmio.write<Reg::Bits_8>(value_1);
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if (mmio.read<Reg::Bits_8>() != value_2) { failed(__LINE__, env); }
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if (compare_mem(mmio_mem, (uint8_t *)&value_3, MMIO_SIZE)) { failed(__LINE__, env); }
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}
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/* bitsets */
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typedef Test_mmio::Bitset_64 Bitset;
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enum { BITSET = 0x4abcdef056789123 };
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