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base-hw: Avoid early calls of cmpxchg
This patch eliminates calls of 'cmpxchg' prior enabling the MMU. This is needed because the 'ldrex' and 'strex' instructions do not always work with MMU and L1 cache disabled, i.e., on Raspberry Pi.
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@ -1,4 +1,4 @@
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/**
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/*
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* \brief Genode-console backend
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* \author Martin Stein
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* \date 2011-10-17
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@ -16,6 +16,9 @@
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#include <base/printf.h>
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#include <drivers/serial_log.h>
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/* base-hw includes */
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#include "singleton.h"
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namespace Genode
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{
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/**
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@ -63,8 +66,7 @@ using namespace Genode;
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*/
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static Platform_console * platform_console()
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{
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static Platform_console static_platform_console;
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return &static_platform_console;
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return unsynchronized_singleton<Platform_console>();
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}
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53
base-hw/src/base/singleton.h
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53
base-hw/src/base/singleton.h
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/*
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* \brief Helper for creating singleton objects
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* \author Norman Feske
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* \date 2013-05-14
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*
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* Before enabling the MMU on ARM, the 'cmpxchg' implementation is not always
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* guaranteed to work. For example, on the Raspberry Pi, the 'ldrex' as used by
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* 'cmpxchg' causes the machine to reboot. After enabling the MMU, everything
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* is fine. Hence, we need to avoid executing 'cmpxchg' prior this point.
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* Unfortunately, 'cmpxchg' is implicitly called each time when creating a
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* singleton object via a local-static object pattern. In this case, the
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* compiler generates code that calls the '__cxa_guard_acquire' function of the
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* C++ runtime, which, in turn, relies 'cmpxchg' for synchronization.
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*
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* The utility provided herein is an alternative way to create single object
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* instances without implicitly calling 'cmpxchg'. Because object creation is
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* not synchronized via a spin lock, it must not be used in scenarios where
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* multiple threads may contend.
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*/
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/*
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* Copyright (C) 2013 Genode Labs GmbH
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*
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* This file is part of the Genode OS framework, which is distributed
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* under the terms of the GNU General Public License version 2.
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*/
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#ifndef _SINGLETON_H_
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#define _SINGLETON_H_
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inline void *operator new(Genode::size_t, void *at) { return at; }
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template <typename T, int ALIGN = 2, typename... Args>
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static inline T *unsynchronized_singleton(Args... args)
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{
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/*
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* Each instantiation of the function template with a different type 'T'
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* yields a dedicated instance of the local static variables, thereby
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* creating the living space for the singleton objects.
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*/
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static bool initialized;
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static int inst[sizeof(T)/sizeof(int) + 1] __attribute__((aligned(ALIGN)));
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/* execute constructor on first call */
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if (!initialized) {
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initialized = true;
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new (&inst) T(args...);
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}
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return reinterpret_cast<T *>(inst);
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}
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#endif /* _SINGLETON_H_ */
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@ -33,6 +33,9 @@
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#include <tlb.h>
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#include <trustzone.h>
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/* base-hw includes */
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#include <singleton.h>
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using namespace Kernel;
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/* get core configuration */
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@ -262,7 +265,7 @@ namespace Kernel
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* Static mode transition control
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*/
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static Mode_transition_control * mtc()
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{ static Mode_transition_control _object; return &_object; }
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{ return unsynchronized_singleton<Mode_transition_control>(); }
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/**
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* Kernel object that represents a Genode PD
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@ -333,7 +336,7 @@ namespace Kernel
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/**
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* Access to static interrupt-controller
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*/
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static Pic * pic() { static Pic _object; return &_object; }
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static Pic * pic() { return unsynchronized_singleton<Pic>(); }
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}
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@ -407,9 +410,11 @@ namespace Kernel
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*/
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static Pd * core()
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{
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static Core_tlb tlb;
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static Pd _pd(&tlb, 0);
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return &_pd;
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constexpr int tlb_align = 1 << Core_tlb::ALIGNM_LOG2;
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Core_tlb *core_tlb = unsynchronized_singleton<Core_tlb, tlb_align>();
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Pd *pd = unsynchronized_singleton<Pd>(core_tlb, nullptr);
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return pd;
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}
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@ -1421,6 +1426,12 @@ extern "C" void kernel()
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/* switch to core address space */
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Cpu::init_virt_kernel(core()->tlb()->base(), core_id());
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/*
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* From this point on, it is safe to use 'cmpxchg', i.e., to create
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* singleton objects via the static-local object pattern. See
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* the comment in 'src/base/singleton.h'.
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*/
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/* create the core main thread */
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static Native_utcb cm_utcb;
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static char cm_stack[DEFAULT_STACK_SIZE]
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@ -25,6 +25,9 @@
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#include <timer.h>
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#include <assert.h>
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/* base-hw includes */
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#include <singleton.h>
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namespace Genode
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{
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class Platform_thread;
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@ -211,8 +214,7 @@ namespace Kernel
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*/
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static Id_alloc * _id_alloc()
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{
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static Id_alloc _id_alloc;
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return &_id_alloc;
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return unsynchronized_singleton<Id_alloc>();
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}
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public:
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@ -224,8 +226,7 @@ namespace Kernel
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*/
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static Pool * pool()
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{
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static Pool _pool;
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return &_pool;
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return unsynchronized_singleton<Pool>();
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}
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/**
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@ -13,11 +13,15 @@ CC_OPT += -DCORE_MAIN=_main
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# add library dependencies
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LIBS += base-common
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# enable C++11 support
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CC_CXX_OPT += -std=gnu++11
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# add include paths
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INC_DIR += $(REP_DIR)/src/core \
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$(REP_DIR)/src/core/include \
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$(REP_DIR)/include \
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$(REP_DIR)/src/platform \
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$(REP_DIR)/src/base \
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$(BASE_DIR)/src/core/include \
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$(BASE_DIR)/include \
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$(BASE_DIR)/src/platform
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@ -106,7 +106,14 @@ namespace Arm
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/* lookup table for AP bitfield values according to 'w' and 'k' flag */
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typedef typename T::Ap_1_0 Ap_1_0;
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typedef typename T::Ap_2 Ap_2;
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static typename T::access_t const ap_bits[2][2] = {{
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/*
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* Note: Don't make 'ap_bits' static to avoid implicit use of 'cmpxchg'
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* prior enabling the MMU.
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*
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* XXX Replace array with a simpler-to-grasp switch statement.
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*/
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typename T::access_t const ap_bits[2][2] = {{
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Ap_1_0::bits(Ap_1_0::USER_RO_ACCESS) | /* -- */
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Ap_2::bits(Ap_2::KERNEL_RW_OR_NO_ACCESS),
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