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hw: rename Genode::Cpu in Processor_driver

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This commit is contained in:
Martin Stein 2014-02-28 17:39:16 +01:00 committed by Norman Feske
parent 108b29d33d
commit 5d444a12dc
29 changed files with 76 additions and 58 deletions

2
base-hw/src/core/arndale/platform_support.cc

@ -86,4 +86,4 @@ Native_region * Platform::_core_only_mmio_regions(unsigned const i)
}
Cpu::User_context::User_context() { cpsr = Psr::init_user(); }
Processor_driver::User_context::User_context() { cpsr = Psr::init_user(); }

4
base-hw/src/core/arndale/processor_driver.h

@ -22,7 +22,7 @@ namespace Genode
/**
* CPU driver for core
*/
class Cpu : public Cortex_a15::Cpu
class Processor_driver : public Cortex_a15::Cpu
{
public:
@ -38,5 +38,7 @@ namespace Genode
};
}
namespace Kernel { typedef Genode::Processor_driver Processor_driver; }
#endif /* _ARNDALE__PROCESSOR_DRIVER_H_ */

2
base-hw/src/core/imx31/platform_support.cc

@ -99,4 +99,4 @@ Native_region * Platform::_core_only_mmio_regions(unsigned const i)
}
Cpu::User_context::User_context() { cpsr = Psr::init_user(); }
Processor_driver::User_context::User_context() { cpsr = Psr::init_user(); }

4
base-hw/src/core/imx31/processor_driver.h

@ -22,8 +22,10 @@ namespace Genode
/**
* CPU driver for core
*/
class Cpu : public Arm_v6::Cpu { };
class Processor_driver : public Arm_v6::Cpu { };
}
namespace Kernel { typedef Genode::Processor_driver Processor_driver; }
#endif /* _IMX31__PROCESSOR_DRIVER_H_ */

2
base-hw/src/core/imx53/no_trustzone/platform_support.cc

@ -105,4 +105,4 @@ Native_region * Platform::_core_only_mmio_regions(unsigned const i)
}
Cpu::User_context::User_context() { cpsr = Psr::init_user(); }
Processor_driver::User_context::User_context() { cpsr = Psr::init_user(); }

4
base-hw/src/core/imx53/processor_driver.h

@ -22,7 +22,7 @@ namespace Genode
/**
* CPU driver for core
*/
class Cpu : public Cortex_a8::Cpu
class Processor_driver : public Cortex_a8::Cpu
{
public:
@ -38,5 +38,7 @@ namespace Genode
};
}
namespace Kernel { typedef Genode::Processor_driver Processor_driver; }
#endif /* _IMX53__PROCESSOR_DRIVER_H_ */

2
base-hw/src/core/imx53/trustzone/platform_support.cc

@ -110,4 +110,4 @@ Native_region * Platform::_core_only_mmio_regions(unsigned const i)
}
Cpu::User_context::User_context() { cpsr = Psr::init_user_with_trustzone(); }
Processor_driver::User_context::User_context() { cpsr = Psr::init_user_with_trustzone(); }

4
base-hw/src/core/imx53/trustzone/trustzone.cc

@ -30,10 +30,10 @@ void Kernel::init_trustzone(Pic * pic)
return;
}
/* set exception vector entry */
Genode::Cpu::mon_exception_entry_at((Genode::addr_t)&_mon_kernel_entry);
Processor_driver::mon_exception_entry_at((Genode::addr_t)&_mon_kernel_entry);
/* enable coprocessor access for TZ VMs */
Genode::Cpu::allow_coprocessor_nonsecure();
Processor_driver::allow_coprocessor_nonsecure();
/* configure non-secure interrupts */
for (unsigned i = 0; i <= Pic::MAX_INTERRUPT_ID; i++) {

2
base-hw/src/core/kernel/irq.cc

@ -22,4 +22,4 @@ namespace Kernel { Pic * pic(); }
void Irq::_disable() const { pic()->mask(_id()); }
void Irq::_enable() const { pic()->unmask(_id(), Genode::Cpu::id()); }
void Irq::_enable() const { pic()->unmask(_id(), Processor_driver::id()); }

20
base-hw/src/core/kernel/kernel.cc

@ -183,7 +183,7 @@ extern "C" void init_kernel_uniprocessor()
multiprocessor();
/* go multiprocessor mode */
Cpu::start_secondary_processors(&_start_secondary_processors);
Processor_driver::start_secondary_processors(&_start_secondary_processors);
}
/**
@ -199,16 +199,16 @@ extern "C" void init_kernel_multiprocessor()
***********************************************************************/
/* synchronize data view of all processors */
Cpu::flush_data_caches();
Cpu::invalidate_instruction_caches();
Cpu::invalidate_control_flow_predictions();
Cpu::data_synchronization_barrier();
Processor_driver::flush_data_caches();
Processor_driver::invalidate_instruction_caches();
Processor_driver::invalidate_control_flow_predictions();
Processor_driver::data_synchronization_barrier();
/* initialize processor in physical mode */
Cpu::init_phys_kernel();
Processor_driver::init_phys_kernel();
/* switch to core address space */
Cpu::init_virt_kernel(core_tlb_base, core_pd_id);
Processor_driver::init_virt_kernel(core_tlb_base, core_pd_id);
/************************************
** Now it's safe to use 'cmpxchg' **
@ -236,11 +236,11 @@ extern "C" void init_kernel_multiprocessor()
/* initialize interrupt controller */
pic()->init_processor_local();
unsigned const processor_id = Cpu::id();
unsigned const processor_id = Processor_driver::id();
pic()->unmask(Timer::interrupt_id(processor_id), processor_id);
/* as primary processor create the core main thread */
if (Cpu::primary_id() == processor_id)
if (Processor_driver::primary_id() == processor_id)
{
/* get stack memory that fullfills the constraints for core stacks */
enum {
@ -278,7 +278,7 @@ extern "C" void init_kernel_multiprocessor()
extern "C" void kernel()
{
data_lock().lock();
unsigned const processor_id = Cpu::id();
unsigned const processor_id = Processor_driver::id();
Processor * const processor = multiprocessor()->select(processor_id);
Processor_scheduler * const scheduler = processor->scheduler();
scheduler->head()->exception(processor_id);

11
base-hw/src/core/kernel/multiprocessor.h

@ -57,7 +57,7 @@ class Kernel::Idle_thread : public Thread
enum {
STACK_SIZE = 4 * 1024,
STACK_ALIGNM = Cpu::DATA_ACCESS_ALIGNM,
STACK_ALIGNM = Processor_driver::DATA_ACCESS_ALIGNM,
};
char _stack[STACK_SIZE] __attribute__((aligned(STACK_ALIGNM)));
@ -65,7 +65,12 @@ class Kernel::Idle_thread : public Thread
/**
* Main function of all idle threads
*/
static void _main() { while (1) { Cpu::wait_for_interrupt(); } }
static void _main()
{
while (1) {
Processor_driver::wait_for_interrupt();
}
}
public:
@ -141,7 +146,7 @@ class Kernel::Multiprocessor
*/
Processor * primary() const
{
return (Processor *)_data[Cpu::primary_id()];
return (Processor *)_data[Processor_driver::primary_id()];
}
};

16
base-hw/src/core/kernel/pd.h

@ -115,7 +115,6 @@ class Kernel::Mode_transition_control
private:
typedef Genode::Cpu Cpu;
typedef Genode::Cpu_state_modes Cpu_state_modes;
typedef Genode::Page_flags Page_flags;
@ -151,7 +150,7 @@ class Kernel::Mode_transition_control
enum {
SIZE_LOG2 = Tlb::MIN_PAGE_SIZE_LOG2,
SIZE = 1 << SIZE_LOG2,
VIRT_BASE = Cpu::EXCEPTION_ENTRY,
VIRT_BASE = Processor_driver::EXCEPTION_ENTRY,
VIRT_END = VIRT_BASE + SIZE,
ALIGNM_LOG2 = SIZE_LOG2,
};
@ -161,7 +160,7 @@ class Kernel::Mode_transition_control
*
* \param c CPU context for kernel mode entry
*/
Mode_transition_control(Cpu::Context * const c)
Mode_transition_control(Processor_driver::Context * const c)
:
_virt_user_entry(VIRT_BASE + ((addr_t)&_mt_user_entry_pic -
(addr_t)&_mt_begin))
@ -176,10 +175,11 @@ class Kernel::Mode_transition_control
addr_t const kc_begin = (addr_t)&_mt_master_context_begin;
addr_t const kc_end = (addr_t)&_mt_master_context_end;
size_t const kc_size = kc_end - kc_begin;
assert(sizeof(Cpu::Context) <= kc_size);
assert(sizeof(Processor_driver::Context) <= kc_size);
/* fetch kernel-mode context */
Genode::memcpy(&_mt_master_context_begin, c, sizeof(Cpu::Context));
Genode::memcpy(&_mt_master_context_begin, c,
sizeof(Processor_driver::Context));
}
/**
@ -204,7 +204,7 @@ class Kernel::Mode_transition_control
* \param context targeted userland context
* \param processor_id kernel name of targeted processor
*/
void continue_user(Cpu::Context * const context,
void continue_user(Processor_driver::Context * const context,
unsigned const processor_id)
{
_continue_client(context, processor_id, _virt_user_entry);
@ -227,8 +227,6 @@ class Kernel::Pd : public Object<Pd, MAX_PDS, Pd_ids, pd_ids, pd_pool>
{
private:
typedef Genode::Cpu Cpu;
Tlb * const _tlb;
Platform_pd * const _platform_pd;
@ -277,7 +275,7 @@ class Kernel::Pd : public Object<Pd, MAX_PDS, Pd_ids, pd_ids, pd_pool>
/**
* Let the CPU context 'c' join the PD
*/
void admit(Cpu::Context * const c)
void admit(Processor_driver::Context * const c)
{
c->protection_domain(id());
c->tlb(tlb()->base());

8
base-hw/src/core/kernel/thread.cc

@ -311,7 +311,7 @@ void Thread::_call_bin_pd()
tlb->~Tlb();
/* clean up buffers of memory management */
Cpu::flush_tlb_by_pid(pd->id());
Processor_driver::flush_tlb_by_pid(pd->id());
user_arg_0(0);
}
@ -424,7 +424,7 @@ void Thread::_call_resume_thread()
void Thread_event::_signal_acknowledged()
{
Cpu::tlb_insertions();
Processor_driver::tlb_insertions();
_thread->_resume();
}
@ -596,7 +596,7 @@ void Thread::_call_access_thread_regs()
void Thread::_call_update_pd()
{
assert(_core());
Cpu::flush_tlb_by_pid(user_arg_1());
Processor_driver::flush_tlb_by_pid(user_arg_1());
}
@ -605,7 +605,7 @@ void Thread::_call_update_region()
assert(_core());
/* FIXME we don't handle instruction caches by now */
Cpu::flush_data_cache_by_virt_region((addr_t)user_arg_1(),
Processor_driver::flush_data_cache_by_virt_region((addr_t)user_arg_1(),
(size_t)user_arg_2());
}

7
base-hw/src/core/kernel/thread.h

@ -27,8 +27,7 @@ namespace Kernel
class Thread;
class Pd;
typedef Genode::Cpu Cpu;
typedef Genode::Native_utcb Native_utcb;
typedef Genode::Native_utcb Native_utcb;
/**
* Kernel backend for userland execution-contexts
@ -48,7 +47,7 @@ namespace Kernel
}
struct Kernel::Cpu_context : Cpu::Context
struct Kernel::Cpu_context : Processor_driver::Context
{
private:
@ -70,7 +69,7 @@ struct Kernel::Cpu_context : Cpu::Context
class Kernel::Thread
:
public Cpu::User_context,
public Processor_driver::User_context,
public Object<Thread, MAX_THREADS, Thread_ids, thread_ids, thread_pool>,
public Execution_context,
public Ipc_node,

2
base-hw/src/core/kernel/vm.h

@ -90,7 +90,7 @@ class Kernel::Vm : public Object<Vm, MAX_VMS, Vm_ids, vm_ids, vm_pool>,
_interrupt(processor_id);
return;
case Genode::Cpu_state::DATA_ABORT:
_state->dfar = Genode::Cpu::Dfar::read();
_state->dfar = Processor_driver::Dfar::read();
default:
Execution_context::_unschedule();
_context->submit(1);

2
base-hw/src/core/odroid_xu/platform_support.cc

@ -81,4 +81,4 @@ Native_region * Platform::_core_only_mmio_regions(unsigned const i)
}
Cpu::User_context::User_context() { cpsr = Psr::init_user(); }
Processor_driver::User_context::User_context() { cpsr = Psr::init_user(); }

4
base-hw/src/core/odroid_xu/processor_driver.h

@ -22,7 +22,7 @@ namespace Genode
/**
* CPU driver for core
*/
class Cpu : public Cortex_a15::Cpu
class Processor_driver : public Cortex_a15::Cpu
{
public:
@ -38,5 +38,7 @@ namespace Genode
};
}
namespace Kernel { typedef Genode::Processor_driver Processor_driver; }
#endif /* _ODROID_XU__PROCESSOR_DRIVER_H_ */

2
base-hw/src/core/panda/platform_support.cc

@ -98,4 +98,4 @@ Native_region * Platform::_core_only_mmio_regions(unsigned const i)
}
Cpu::User_context::User_context() { cpsr = Psr::init_user(); }
Processor_driver::User_context::User_context() { cpsr = Psr::init_user(); }

4
base-hw/src/core/panda/processor_driver.h

@ -22,7 +22,7 @@ namespace Genode
/**
* CPU driver for core
*/
class Cpu : public Cortex_a9::Cpu
class Processor_driver : public Cortex_a9::Cpu
{
public:
@ -38,5 +38,7 @@ namespace Genode
};
}
namespace Kernel { typedef Genode::Processor_driver Processor_driver; }
#endif /* _PANDA__PROCESSOR_DRIVER_H_ */

2
base-hw/src/core/pbxa9/platform_support.cc

@ -93,4 +93,4 @@ Native_region * Platform::_core_only_mmio_regions(unsigned const i)
}
Cpu::User_context::User_context() { cpsr = Psr::init_user(); }
Processor_driver::User_context::User_context() { cpsr = Psr::init_user(); }

4
base-hw/src/core/pbxa9/processor_driver.h

@ -22,7 +22,7 @@ namespace Genode
/**
* CPU driver for core
*/
class Cpu : public Cortex_a9::Cpu
class Processor_driver : public Cortex_a9::Cpu
{
public:
@ -38,5 +38,7 @@ namespace Genode
};
}
namespace Kernel { typedef Genode::Processor_driver Processor_driver; }
#endif /* _PBXA9__PROCESSOR_DRIVER_H_ */

4
base-hw/src/core/pic/cortex_a9.h

@ -30,8 +30,8 @@ namespace Cortex_a9
/**
* Constructor
*/
Pic() : Arm_gic::Pic(Genode::Cpu::PL390_DISTRIBUTOR_MMIO_BASE,
Genode::Cpu::PL390_CPU_MMIO_BASE) { }
Pic() : Arm_gic::Pic(Processor_driver::PL390_DISTRIBUTOR_MMIO_BASE,
Processor_driver::PL390_CPU_MMIO_BASE) { }
};
}

4
base-hw/src/core/pic/vea9x4_trustzone.h

@ -32,8 +32,8 @@ namespace Vea9x4_trustzone
/**
* Constructor
*/
Pic() : Arm_gic::Pic(Genode::Cpu::PL390_DISTRIBUTOR_MMIO_BASE,
Genode::Cpu::PL390_CPU_MMIO_BASE)
Pic() : Arm_gic::Pic(Processor_driver::PL390_DISTRIBUTOR_MMIO_BASE,
Processor_driver::PL390_CPU_MMIO_BASE)
{
/* configure every shared peripheral interrupt */
for (unsigned i=MIN_SPI; i <= _max_interrupt; i++) {

2
base-hw/src/core/rpi/platform_support.cc

@ -87,4 +87,4 @@ Native_region * Platform::_core_only_mmio_regions(unsigned const i)
}
Cpu::User_context::User_context() { cpsr = Psr::init_user(); }
Processor_driver::User_context::User_context() { cpsr = Psr::init_user(); }

4
base-hw/src/core/rpi/processor_driver.h

@ -17,7 +17,9 @@
/* core includes */
#include <processor_driver/arm_v6.h>
namespace Genode { struct Cpu : Arm_v6::Cpu { }; }
namespace Genode { class Processor_driver : public Arm_v6::Cpu { }; }
namespace Kernel { typedef Genode::Processor_driver Processor_driver; }
#endif /* _RPI__PROCESSOR_DRIVER_H_ */

2
base-hw/src/core/vea9x4/no_trustzone/platform_support.cc

@ -96,4 +96,4 @@ Native_region * Platform::_core_only_mmio_regions(unsigned const i)
}
Cpu::User_context::User_context() { cpsr = Psr::init_user(); }
Processor_driver::User_context::User_context() { cpsr = Psr::init_user(); }

4
base-hw/src/core/vea9x4/processor_driver.h

@ -22,7 +22,7 @@ namespace Genode
/**
* CPU driver for core
*/
class Cpu : public Cortex_a9::Cpu
class Processor_driver : public Cortex_a9::Cpu
{
public:
@ -38,5 +38,7 @@ namespace Genode
};
}
namespace Kernel { typedef Genode::Processor_driver Processor_driver; }
#endif /* _VEA9X4__PROCESSOR_DRIVER_H_ */

2
base-hw/src/core/vea9x4/trustzone/platform_support.cc

@ -98,4 +98,4 @@ Native_region * Platform::_core_only_mmio_regions(unsigned const i)
}
Cpu::User_context::User_context() { cpsr = Psr::init_user_with_trustzone(); }
Processor_driver::User_context::User_context() { cpsr = Psr::init_user_with_trustzone(); }

4
base-hw/src/core/vea9x4/trustzone/trustzone.cc

@ -28,10 +28,10 @@ void Kernel::init_trustzone(Pic * pic)
return;
}
/* set exception vector entry */
Genode::Cpu::mon_exception_entry_at((Genode::addr_t)&_mon_kernel_entry);
Processor_driver::mon_exception_entry_at((Genode::addr_t)&_mon_kernel_entry);
/* enable coprocessor access for TZ VMs */
Genode::Cpu::allow_coprocessor_nonsecure();
Processor_driver::allow_coprocessor_nonsecure();
/* set unsecure IRQs */
pic->unsecure(34); //Timer 0/1