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hw: check for security extension support in GICv2

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Ref #3638
This commit is contained in:
Stefan Kalkowski 2020-02-21 11:35:43 +01:00 committed by Christian Helmuth
parent fca2a05adf
commit 58db6542f8
2 changed files with 11 additions and 6 deletions
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10
repos/base-hw/src/bootstrap/spec/arm/gicv2.cc
View File

@ -20,6 +20,8 @@ Hw::Gicv2::Gicv2()
_max_irq(_distr.max_irq()) _max_irq(_distr.max_irq())
{ {
static bool distributor_initialized = false; static bool distributor_initialized = false;
bool use_group_1 = Board::NON_SECURE &&
_distr.read<Distributor::Typer::Security_extension>();
if (!distributor_initialized) { if (!distributor_initialized) {
distributor_initialized = true; distributor_initialized = true;
@ -29,7 +31,7 @@ Hw::Gicv2::Gicv2()
/* configure every shared peripheral interrupt */ /* configure every shared peripheral interrupt */
for (unsigned i = min_spi; i <= _max_irq; i++) { for (unsigned i = min_spi; i <= _max_irq; i++) {
if (Board::NON_SECURE) { if (use_group_1) {
_distr.write<Distributor::Igroupr::Group_status>(1, i); _distr.write<Distributor::Igroupr::Group_status>(1, i);
} }
_distr.write<Distributor::Icfgr::Edge_triggered>(0, i); _distr.write<Distributor::Icfgr::Edge_triggered>(0, i);
@ -39,7 +41,7 @@ Hw::Gicv2::Gicv2()
/* enable device */ /* enable device */
Distributor::Ctlr::access_t v = 0; Distributor::Ctlr::access_t v = 0;
if (Board::NON_SECURE) { if (use_group_1) {
Distributor::Ctlr::Enable_grp0::set(v, 1); Distributor::Ctlr::Enable_grp0::set(v, 1);
Distributor::Ctlr::Enable_grp1::set(v, 1); Distributor::Ctlr::Enable_grp1::set(v, 1);
} else { } else {
@ -48,7 +50,7 @@ Hw::Gicv2::Gicv2()
_distr.write<Distributor::Ctlr>(v); _distr.write<Distributor::Ctlr>(v);
} }
if (Board::NON_SECURE) { if (use_group_1) {
_cpui.write<Cpu_interface::Ctlr>(0); _cpui.write<Cpu_interface::Ctlr>(0);
/* mark software-generated IRQs as being non-secure */ /* mark software-generated IRQs as being non-secure */
@ -64,7 +66,7 @@ Hw::Gicv2::Gicv2()
/* enable device */ /* enable device */
Cpu_interface::Ctlr::access_t v = 0; Cpu_interface::Ctlr::access_t v = 0;
if (Board::NON_SECURE) { if (use_group_1) {
Cpu_interface::Ctlr::Enable_grp0::set(v, 1); Cpu_interface::Ctlr::Enable_grp0::set(v, 1);
Cpu_interface::Ctlr::Enable_grp1::set(v, 1); Cpu_interface::Ctlr::Enable_grp1::set(v, 1);
Cpu_interface::Ctlr::Fiq_en::set(v, 1); Cpu_interface::Ctlr::Fiq_en::set(v, 1);

7
repos/base-hw/src/include/hw/spec/arm/gicv2.h
View File

@ -43,8 +43,11 @@ class Hw::Gicv2
/** /**
* Controller type register * Controller type register
*/ */
struct Typer : Register<0x004, 32> { struct Typer : Register<0x004, 32>
struct It_lines_number : Bitfield<0,5> { }; }; {
struct It_lines_number : Bitfield<0,5> { };
struct Security_extension : Bitfield<10,1> { };
};
/** /**
* Interrupt group register * Interrupt group register