From 4d2a3de0ee70b8109461ef21cadc9a1926fa16c4 Mon Sep 17 00:00:00 2001 From: Martin Stein Date: Wed, 7 Nov 2012 07:56:22 +0100 Subject: [PATCH] base_hw: Rename 'Software_tlb' 'Tlb'. --- base-hw/include/base/native_types.h | 12 +++++------ base-hw/include/kernel/syscalls.h | 14 ++++++------- .../src/core/imx31/{software_tlb.h => tlb.h} | 8 +++---- base-hw/src/core/include/arm/cpu.h | 4 ++-- base-hw/src/core/include/platform_thread.h | 4 ++-- base-hw/src/core/kernel.cc | 21 +++++++++---------- .../core/panda_a2/{software_tlb.h => tlb.h} | 8 +++---- .../src/core/pbxa9/{software_tlb.h => tlb.h} | 8 +++---- base-hw/src/core/platform_thread.cc | 4 ++-- base-hw/src/core/rm_session_support.cc | 6 +++--- .../src/core/vea9x4/{software_tlb.h => tlb.h} | 8 +++---- 11 files changed, 47 insertions(+), 50 deletions(-) rename base-hw/src/core/imx31/{software_tlb.h => tlb.h} (67%) rename base-hw/src/core/panda_a2/{software_tlb.h => tlb.h} (66%) rename base-hw/src/core/pbxa9/{software_tlb.h => tlb.h} (67%) rename base-hw/src/core/vea9x4/{software_tlb.h => tlb.h} (67%) diff --git a/base-hw/include/base/native_types.h b/base-hw/include/base/native_types.h index 3594c7f3e1..db30e3e3fc 100644 --- a/base-hw/include/base/native_types.h +++ b/base-hw/include/base/native_types.h @@ -47,11 +47,11 @@ namespace Genode */ struct Pagefault { - unsigned long thread_id; /* thread ID of the faulter */ - Software_tlb * software_tlb; /* TLB to wich the faulter is assigned */ - addr_t virt_ip; /* the faulters virtual instruction pointer */ + unsigned long thread_id; /* thread ID of the faulter */ + Tlb * tlb; /* TLB to wich the faulter is assigned */ + addr_t virt_ip; /* the faulters virtual instruction pointer */ addr_t virt_address; /* virtual fault address */ - bool write; /* write access attempted at fault? */ + bool write; /* write access attempted at fault? */ /** * Placement new operator @@ -66,10 +66,10 @@ namespace Genode /** * Construct valid pagefault */ - Pagefault(unsigned const tid, Software_tlb * const sw_tlb, + Pagefault(unsigned const tid, Tlb * const tlb, addr_t const vip, addr_t const va, bool const w) : - thread_id(tid), software_tlb(sw_tlb), virt_ip(vip), + thread_id(tid), tlb(tlb), virt_ip(vip), virt_address(va), write(w) { } diff --git a/base-hw/include/kernel/syscalls.h b/base-hw/include/kernel/syscalls.h index 0000f8ce40..59bb373a89 100644 --- a/base-hw/include/kernel/syscalls.h +++ b/base-hw/include/kernel/syscalls.h @@ -17,7 +17,7 @@ /* Genode includes */ #include -class Software_tlb; +class Tlb; namespace Genode { @@ -201,21 +201,19 @@ namespace Kernel * \param ip initial instruction pointer * \param sp initial stack pointer * - * \retval >0 success, return value is the software TLB of the thread + * \retval >0 success, return value is the TLB of the thread * \retval 0 the targeted thread wasn't started or was already started * when this gets called (in both cases it remains untouched) * * Restricted to core threads. */ - inline Software_tlb * + inline Tlb * start_thread(Genode::Platform_thread * const phys_pt, void * ip, void * sp, unsigned int cpu_no) { - return (Software_tlb *)syscall(START_THREAD, - (Syscall_arg)phys_pt, - (Syscall_arg)ip, - (Syscall_arg)sp, - (Syscall_arg)cpu_no); + return (Tlb *)syscall(START_THREAD, (Syscall_arg)phys_pt, + (Syscall_arg)ip, (Syscall_arg)sp, + (Syscall_arg)cpu_no); } diff --git a/base-hw/src/core/imx31/software_tlb.h b/base-hw/src/core/imx31/tlb.h similarity index 67% rename from base-hw/src/core/imx31/software_tlb.h rename to base-hw/src/core/imx31/tlb.h index 4b411f04ee..601adaddfc 100644 --- a/base-hw/src/core/imx31/software_tlb.h +++ b/base-hw/src/core/imx31/tlb.h @@ -11,8 +11,8 @@ * under the terms of the GNU General Public License version 2. */ -#ifndef _SRC__CORE__IMX31__SOFTWARE_TLB_H_ -#define _SRC__CORE__IMX31__SOFTWARE_TLB_H_ +#ifndef _SRC__CORE__IMX31__TLB_H_ +#define _SRC__CORE__IMX31__TLB_H_ /* Genode includes */ #include @@ -20,7 +20,7 @@ /** * Software TLB controls */ -class Software_tlb : public Arm_v6::Section_table { }; +class Tlb : public Arm_v6::Section_table { }; -#endif /* _SRC__CORE__IMX31__SOFTWARE_TLB_H_ */ +#endif /* _SRC__CORE__IMX31__TLB_H_ */ diff --git a/base-hw/src/core/include/arm/cpu.h b/base-hw/src/core/include/arm/cpu.h index 59e59784a9..8111bbd8e2 100644 --- a/base-hw/src/core/include/arm/cpu.h +++ b/base-hw/src/core/include/arm/cpu.h @@ -475,9 +475,9 @@ namespace Arm ** Accessors ** ***************/ - void software_tlb(addr_t const st) { section_table = st; } + void tlb(addr_t const st) { section_table = st; } - addr_t software_tlb() const { return section_table; } + addr_t tlb() const { return section_table; } void protection_domain(unsigned const id) { cidr = id; } }; diff --git a/base-hw/src/core/include/platform_thread.h b/base-hw/src/core/include/platform_thread.h index 8f0242ed35..b5348a2efc 100644 --- a/base-hw/src/core/include/platform_thread.h +++ b/base-hw/src/core/include/platform_thread.h @@ -46,7 +46,7 @@ namespace Genode { bool _main_thread; Native_utcb * _phys_utcb; Native_utcb * _virt_utcb; - Software_tlb * _software_tlb; + Tlb * _tlb; Ram_dataspace_capability _utcb; char _name[NAME_MAX_LEN]; void * _kernel_thread; @@ -176,7 +176,7 @@ namespace Genode { Ram_dataspace_capability utcb() const { return _utcb; } - Software_tlb * software_tlb() const { return _software_tlb; } + Tlb * tlb() const { return _tlb; } }; } diff --git a/base-hw/src/core/kernel.cc b/base-hw/src/core/kernel.cc index 5eab39b934..04bf64ccc4 100644 --- a/base-hw/src/core/kernel.cc +++ b/base-hw/src/core/kernel.cc @@ -32,7 +32,7 @@ #include #include #include -#include +#include #include using namespace Kernel; @@ -728,7 +728,7 @@ namespace Kernel struct Mode_transition_control { enum { - SIZE_LOG2 = Software_tlb::MIN_PAGE_SIZE_LOG2, + SIZE_LOG2 = Tlb::MIN_PAGE_SIZE_LOG2, SIZE = 1 << SIZE_LOG2, VIRT_BASE = Cpu::EXCEPTION_ENTRY, VIRT_END = VIRT_BASE + SIZE, @@ -787,20 +787,20 @@ namespace Kernel */ class Pd_base { - Software_tlb _tlb; + Tlb _tlb; public: /** * Alignment that instances of this class need */ - static unsigned alignm_log2() { return Software_tlb::ALIGNM_LOG2; } + static unsigned alignm_log2() { return Tlb::ALIGNM_LOG2; } /*************** ** Accessors ** ***************/ - Software_tlb * tlb() { return &_tlb; } + Tlb * tlb() { return &_tlb; } }; /** @@ -811,7 +811,7 @@ namespace Kernel { /* keep ready memory for size aligned extra costs at construction */ - enum { EXTRA_SPACE_SIZE = 2*Software_tlb::MAX_COSTS_PER_TRANSLATION }; + enum { EXTRA_SPACE_SIZE = 2*Tlb::MAX_COSTS_PER_TRANSLATION }; char _extra_space[EXTRA_SPACE_SIZE]; public: @@ -857,7 +857,7 @@ namespace Kernel void append_context(Cpu::Context * const c) { c->protection_domain(id()); - c->software_tlb(tlb()->base()); + c->tlb(tlb()->base()); } }; @@ -2128,7 +2128,7 @@ extern "C" void kernel() { /* map everything except the mode transition region */ enum { - SIZE_LOG2 = Software_tlb::MAX_PAGE_SIZE_LOG2, + SIZE_LOG2 = Tlb::MAX_PAGE_SIZE_LOG2, SIZE = 1 << SIZE_LOG2, }; if (mtc()->VIRT_END <= a || mtc()->VIRT_BASE > (a + SIZE - 1)) @@ -2222,7 +2222,7 @@ void Thread::init_context(void * const instr_p, void * const stack_p, Pd * const pd = Pd::pool()->object(_pd_id); assert(pd) protection_domain(pd_id); - software_tlb(pd->tlb()->base()); + tlb(pd->tlb()->base()); } @@ -2234,8 +2234,7 @@ void Thread::pagefault(addr_t const va, bool const w) /* inform pager through IPC */ assert(_pager); - Software_tlb * const tlb = (Software_tlb *)software_tlb(); - _pagefault = Pagefault(id(), tlb, ip, va, w); + _pagefault = Pagefault(id(), (Tlb *)tlb(), ip, va, w); Ipc_node::send_note(_pager, &_pagefault, sizeof(_pagefault)); } diff --git a/base-hw/src/core/panda_a2/software_tlb.h b/base-hw/src/core/panda_a2/tlb.h similarity index 66% rename from base-hw/src/core/panda_a2/software_tlb.h rename to base-hw/src/core/panda_a2/tlb.h index 6998cd7b93..da163e031f 100644 --- a/base-hw/src/core/panda_a2/software_tlb.h +++ b/base-hw/src/core/panda_a2/tlb.h @@ -11,8 +11,8 @@ * under the terms of the GNU General Public License version 2. */ -#ifndef _SRC__CORE__PANDA_A2__SOFTWARE_TLB_H_ -#define _SRC__CORE__PANDA_A2__SOFTWARE_TLB_H_ +#ifndef _SRC__CORE__PANDA_A2__TLB_H_ +#define _SRC__CORE__PANDA_A2__TLB_H_ /* Genode includes */ #include @@ -20,7 +20,7 @@ /** * Software TLB controls */ -class Software_tlb : public Arm_v7::Section_table { }; +class Tlb : public Arm_v7::Section_table { }; -#endif /* _SRC__CORE__PANDA_A2__SOFTWARE_TLB_H_ */ +#endif /* _SRC__CORE__PANDA_A2__TLB_H_ */ diff --git a/base-hw/src/core/pbxa9/software_tlb.h b/base-hw/src/core/pbxa9/tlb.h similarity index 67% rename from base-hw/src/core/pbxa9/software_tlb.h rename to base-hw/src/core/pbxa9/tlb.h index 3761f445df..1897d65520 100644 --- a/base-hw/src/core/pbxa9/software_tlb.h +++ b/base-hw/src/core/pbxa9/tlb.h @@ -11,8 +11,8 @@ * under the terms of the GNU General Public License version 2. */ -#ifndef _SRC__CORE__PBXA9__SOFTWARE_TLB_H_ -#define _SRC__CORE__PBXA9__SOFTWARE_TLB_H_ +#ifndef _SRC__CORE__PBXA9__TLB_H_ +#define _SRC__CORE__PBXA9__TLB_H_ /* core includes */ #include @@ -20,7 +20,7 @@ /** * Software TLB controls */ -class Software_tlb : public Arm_v7::Section_table { }; +class Tlb : public Arm_v7::Section_table { }; -#endif /* _SRC__CORE__PBXA9__SOFTWARE_TLB_H_ */ +#endif /* _SRC__CORE__PBXA9__TLB_H_ */ diff --git a/base-hw/src/core/platform_thread.cc b/base-hw/src/core/platform_thread.cc index d1333de96a..df4c27b595 100644 --- a/base-hw/src/core/platform_thread.cc +++ b/base-hw/src/core/platform_thread.cc @@ -153,8 +153,8 @@ int Platform_thread::start(void * ip, void * sp, unsigned int cpu_no) catch (...) { assert(0); } } /* let thread participate in CPU scheduling */ - _software_tlb = Kernel::start_thread(this, ip, sp, cpu_no); - return _software_tlb ? 0 : -1; + _tlb = Kernel::start_thread(this, ip, sp, cpu_no); + return _tlb ? 0 : -1; } diff --git a/base-hw/src/core/rm_session_support.cc b/base-hw/src/core/rm_session_support.cc index 3c739dfa36..ca46b88994 100644 --- a/base-hw/src/core/rm_session_support.cc +++ b/base-hw/src/core/rm_session_support.cc @@ -19,7 +19,7 @@ #include #include #include -#include +#include using namespace Genode; @@ -34,7 +34,7 @@ void Rm_client::unmap(addr_t core_local_base, addr_t virt_base, size_t size) /* get software TLB of the thread that we serve */ Platform_thread * const pt = Kernel::get_thread(badge()); assert(pt); - Software_tlb * const tlb = pt->software_tlb(); + Tlb * const tlb = pt->tlb(); assert(tlb); /* update all translation caches */ @@ -58,7 +58,7 @@ void Ipc_pager::resolve_and_wait_for_fault() assert(_mapping.valid()); /* do we need extra space to resolve pagefault? */ - Software_tlb * const tlb = _pagefault.software_tlb; + Tlb * const tlb = _pagefault.tlb; enum { X = 1, K = 0, G = 0 }; bool c = !_mapping.write_combined && !_mapping.io_mem; bool d = _mapping.io_mem; diff --git a/base-hw/src/core/vea9x4/software_tlb.h b/base-hw/src/core/vea9x4/tlb.h similarity index 67% rename from base-hw/src/core/vea9x4/software_tlb.h rename to base-hw/src/core/vea9x4/tlb.h index b9e8bc8c8a..b8b369e419 100644 --- a/base-hw/src/core/vea9x4/software_tlb.h +++ b/base-hw/src/core/vea9x4/tlb.h @@ -11,8 +11,8 @@ * under the terms of the GNU General Public License version 2. */ -#ifndef _SRC__CORE__VEA9X4__SOFTWARE_TLB_H_ -#define _SRC__CORE__VEA9X4__SOFTWARE_TLB_H_ +#ifndef _SRC__CORE__VEA9X4__TLB_H_ +#define _SRC__CORE__VEA9X4__TLB_H_ /* Genode includes */ #include @@ -20,7 +20,7 @@ /** * Software TLB controls */ -class Software_tlb : public Arm_v7::Section_table { }; +class Tlb : public Arm_v7::Section_table { }; -#endif /* _SRC__CORE__VEA9X4__SOFTWARE_TLB_H_ */ +#endif /* _SRC__CORE__VEA9X4__TLB_H_ */