mirror of
https://github.com/genodelabs/genode.git
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parent
05603951b6
commit
4b7d58fccc
@ -1,5 +1,5 @@
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/*
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* \brief CPU driver for core
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* \brief Processor driver for core
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* \author Martin Stein
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* \date 2012-04-23
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*/
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@ -19,8 +19,10 @@
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namespace Genode
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{
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using Cortex_a15::Processor_lazy_state;
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/**
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* CPU driver for core
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* Processor driver for core
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*/
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class Processor_driver : public Cortex_a15::Processor_driver
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{
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@ -41,7 +43,5 @@ namespace Genode
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};
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}
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namespace Kernel { typedef Genode::Processor_driver Processor_driver; }
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#endif /* _ARNDALE__PROCESSOR_DRIVER_H_ */
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@ -1,5 +1,5 @@
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/*
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* \brief CPU driver for core
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* \brief Processor driver for core
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* \author Martin Stein
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* \date 2012-04-23
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*/
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@ -19,13 +19,9 @@
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namespace Genode
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{
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/**
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* CPU driver for core
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*/
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class Processor_driver : public Arm_v6::Processor_driver { };
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using Arm_v6::Processor_lazy_state;
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using Arm_v6::Processor_driver;
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}
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namespace Kernel { typedef Genode::Processor_driver Processor_driver; }
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#endif /* _IMX31__PROCESSOR_DRIVER_H_ */
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@ -1,5 +1,5 @@
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/*
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* \brief CPU driver for core
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* \brief Processor driver for core
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* \author Martin Stein
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* \date 2012-12-14
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*/
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@ -19,8 +19,10 @@
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namespace Genode
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{
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using Cortex_a8::Processor_lazy_state;
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/**
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* CPU driver for core
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* Processor driver for core
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*/
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class Processor_driver : public Cortex_a8::Processor_driver
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{
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@ -38,7 +40,5 @@ namespace Genode
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};
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}
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namespace Kernel { typedef Genode::Processor_driver Processor_driver; }
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#endif /* _IMX53__PROCESSOR_DRIVER_H_ */
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@ -341,7 +341,7 @@ extern "C" void kernel()
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/* determine local processor scheduler */
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unsigned const processor_id = Processor::executing_id();
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Processor * const processor = processor_pool()->processor(processor_id);
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Processor_scheduler * const scheduler = processor->scheduler();
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Scheduler<Processor_client> * const scheduler = processor->scheduler();
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/*
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* Request the current processor occupant without any update. While this
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@ -349,17 +349,20 @@ extern "C" void kernel()
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* scheduling of the local activities in a way that an update would return
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* an occupant other than that whose exception caused the kernel entry.
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*/
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Processor_client * const old_occupant = scheduler->occupant();
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old_occupant->exception(processor_id);
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Processor_client * const old_client = scheduler->occupant();
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Processor_lazy_state * const old_state = old_client->lazy_state();
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old_client->exception(processor_id);
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/*
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* The processor local as well as remote exception-handling may have
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* changed the scheduling of the local activities. Hence we must update the
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* processor occupant.
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*/
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Processor_client * const new_occupant = scheduler->update_occupant();
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if (old_occupant != new_occupant) { reset_scheduling_time(processor_id); }
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new_occupant->proceed(processor_id);
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Processor_client * const new_client = scheduler->update_occupant();
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Processor_lazy_state * const new_state = new_client->lazy_state();
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if (old_client != new_client) { reset_scheduling_time(processor_id); }
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processor->prepare_proceeding(old_state, new_state);
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new_client->proceed(processor_id);
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}
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@ -49,13 +49,13 @@ void Kernel::Processor_client::_interrupt(unsigned const processor_id)
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/* check wether the interrupt is a processor-scheduling timeout */
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if (timer()->interrupt_id(processor_id) == irq_id) {
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__processor->scheduler()->yield_occupation();
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_processor->scheduler()->yield_occupation();
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timer()->clear_interrupt(processor_id);
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/* check wether the interrupt is our inter-processor interrupt */
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} else if (ic->is_ip_interrupt(irq_id, processor_id)) {
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__processor->ip_interrupt();
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_processor->ip_interrupt();
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/* after all it must be a user interrupt */
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} else {
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@ -69,7 +69,7 @@ void Kernel::Processor_client::_interrupt(unsigned const processor_id)
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}
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void Kernel::Processor_client::_schedule() { __processor->schedule(this); }
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void Kernel::Processor_client::_schedule() { _processor->schedule(this); }
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void Kernel::Processor_client::tlb_to_flush(unsigned pd_id)
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@ -141,15 +141,15 @@ void Kernel::Processor::schedule(Processor_client * const client)
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void Kernel::Processor_client::_unschedule()
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{
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assert(__processor->id() == Processor::executing_id());
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__processor->scheduler()->remove(this);
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assert(_processor->id() == Processor::executing_id());
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_processor->scheduler()->remove(this);
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}
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void Kernel::Processor_client::_yield()
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{
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assert(__processor->id() == Processor::executing_id());
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__processor->scheduler()->yield_occupation();
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assert(_processor->id() == Processor::executing_id());
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_processor->scheduler()->yield_occupation();
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}
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@ -23,6 +23,9 @@
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namespace Kernel
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{
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using Genode::Processor_driver;
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using Genode::Processor_lazy_state;
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/**
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* A single user of a multiplexable processor
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*/
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@ -41,12 +44,11 @@ namespace Kernel
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class Kernel::Processor_client : public Processor_scheduler::Item
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{
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private:
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Processor * __processor;
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protected:
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Processor * _processor;
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Processor_lazy_state _lazy_state;
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using List_item = Genode::List_element<Processor_client>;
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List_item _flush_tlb_li; /* TLB maintainance work list item */
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@ -75,16 +77,6 @@ class Kernel::Processor_client : public Processor_scheduler::Item
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*/
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void _yield();
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/***************
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** Accessors **
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***************/
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void _processor(Processor * const processor)
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{
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__processor = processor;
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}
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public:
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/**
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@ -122,7 +114,7 @@ class Kernel::Processor_client : public Processor_scheduler::Item
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Processor_client(Processor * const processor, Priority const priority)
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:
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Processor_scheduler::Item(priority),
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__processor(processor),
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_processor(processor),
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_flush_tlb_li(this)
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{ }
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@ -134,6 +126,13 @@ class Kernel::Processor_client : public Processor_scheduler::Item
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if (!_scheduled()) { return; }
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_unschedule();
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}
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/***************
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** Accessors **
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***************/
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Processor_lazy_state * lazy_state() { return &_lazy_state; }
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};
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class Kernel::Processor : public Processor_driver
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@ -167,7 +167,7 @@ void Thread::init(Processor * const processor, Pd * const pd,
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assert(_state == AWAITS_START)
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/* store thread parameters */
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Processor_client::_processor(processor);
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Processor_client::_processor = processor;
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_utcb_phys = utcb_phys;
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/* join protection domain */
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@ -210,11 +210,17 @@ void Thread::exception(unsigned const processor_id)
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case FAST_INTERRUPT_REQUEST:
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_interrupt(processor_id);
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return;
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case UNDEFINED_INSTRUCTION:
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if (_processor->retry_undefined_instr(&_lazy_state)) { return; }
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PWRN("undefined instruction");
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_stop();
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return;
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case RESET:
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return;
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default:
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PWRN("unknown exception");
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_stop();
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return;
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}
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}
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/*
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* \brief CPU driver for core
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* \brief Processor driver for core
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* \author Martin Stein
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* \date 2012-04-23
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*/
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@ -19,8 +19,10 @@
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namespace Genode
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{
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using Cortex_a15::Processor_lazy_state;
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/**
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* CPU driver for core
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* Processor driver for core
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*/
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class Processor_driver : public Cortex_a15::Processor_driver
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{
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@ -38,7 +40,5 @@ namespace Genode
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};
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}
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namespace Kernel { typedef Genode::Processor_driver Processor_driver; }
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#endif /* _ODROID_XU__PROCESSOR_DRIVER_H_ */
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/*
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* \brief CPU driver for core
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* \brief Processor driver for core
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* \author Martin Stein
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* \date 2012-04-23
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*/
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@ -19,8 +19,10 @@
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namespace Genode
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{
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using Cortex_a9::Processor_lazy_state;
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/**
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* CPU driver for core
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* Processor driver for core
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*/
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class Processor_driver : public Cortex_a9::Processor_driver
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{
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@ -38,7 +40,5 @@ namespace Genode
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};
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}
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namespace Kernel { typedef Genode::Processor_driver Processor_driver; }
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#endif /* _PANDA__PROCESSOR_DRIVER_H_ */
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/*
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* \brief CPU driver for core
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* \brief Processor driver for core
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* \author Martin Stein
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* \date 2012-04-23
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*/
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@ -19,8 +19,10 @@
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namespace Genode
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{
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using Cortex_a9::Processor_lazy_state;
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/**
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* CPU driver for core
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* Processor driver for core
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*/
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class Processor_driver : public Cortex_a9::Processor_driver
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{
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@ -38,7 +40,5 @@ namespace Genode
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};
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}
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namespace Kernel { typedef Genode::Processor_driver Processor_driver; }
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#endif /* _PBXA9__PROCESSOR_DRIVER_H_ */
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@ -1,5 +1,5 @@
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/*
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* \brief CPU driver for core
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* \brief Processor driver for core
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* \author Norman Feske
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* \author Martin stein
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* \date 2012-08-30
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@ -27,7 +27,12 @@ namespace Arm_v6
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using namespace Genode;
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/**
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* CPU driver for core
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* Part of processor state that is not switched on every mode transition
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*/
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class Processor_lazy_state { };
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/**
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* Processor driver for core
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*/
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struct Processor_driver : Arm::Processor_driver
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{
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@ -213,6 +218,18 @@ namespace Arm_v6
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* Return kernel name of the executing processor
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*/
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static unsigned executing_id() { return primary_id(); }
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/**
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* Prepare for the proceeding of a user
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*/
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static void prepare_proceeding(Processor_lazy_state *,
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Processor_lazy_state *) { }
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/**
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* Return wether to retry an undefined user instruction after this call
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*/
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bool retry_undefined_instr(Processor_lazy_state *) { return false; }
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};
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}
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@ -290,6 +290,8 @@ namespace Arm_v7
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Sctlr::write(Sctlr::init_virt_kernel());
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}
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inline static void finish_init_phys_kernel();
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/**
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* Configure this module appropriately for the first kernel run
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*/
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@ -299,6 +301,7 @@ namespace Arm_v7
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Sctlr::write(Sctlr::init_phys_kernel());
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Psr::write(Psr::init_kernel());
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flush_tlb();
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finish_init_phys_kernel();
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}
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/**
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@ -1,5 +1,5 @@
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/*
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* \brief CPU driver for core
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* \brief Processor driver for core
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* \author Martin stein
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* \date 2011-11-03
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*/
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@ -24,21 +24,40 @@
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namespace Cortex_a15
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{
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using namespace Genode;
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/**
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* Part of processor state that is not switched on every mode transition
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*/
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class Processor_lazy_state { };
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/**
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* CPU driver for core
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* Processor driver for core
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*/
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struct Processor_driver : Arm_v7::Processor_driver
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{
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/**
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* Ensure that TLB insertions get applied
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*
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* Nothing to do because MMU uses caches on pagetable walks
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*/
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static void tlb_insertions() { }
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/**
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* Prepare for the proceeding of a user
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*/
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static void prepare_proceeding(Processor_lazy_state *,
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Processor_lazy_state *) { }
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/**
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* Return wether to retry an undefined user instruction after this call
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*/
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bool retry_undefined_instr(Processor_lazy_state *) { return false; }
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};
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}
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/******************************
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** Arm_v7::Processor_driver **
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******************************/
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void Arm_v7::Processor_driver::finish_init_phys_kernel() { }
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#endif /* _PROCESSOR_DRIVER__CORTEX_A15_H_ */
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|
@ -1,5 +1,5 @@
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/*
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* \brief CPU driver for core
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* \brief Processor driver for core
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* \author Martin stein
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* \date 2011-11-03
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*/
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@ -19,10 +19,13 @@
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namespace Cortex_a8
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{
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using namespace Genode;
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/**
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* Part of processor state that is not switched on every mode transition
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*/
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class Processor_lazy_state { };
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/**
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* CPU driver for core
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* Processor driver for core
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*/
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struct Processor_driver : Arm_v7::Processor_driver
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{
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@ -30,8 +33,26 @@ namespace Cortex_a8
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* Ensure that TLB insertions get applied
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*/
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static void tlb_insertions() { flush_tlb(); }
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/**
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* Prepare for the proceeding of a user
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*/
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static void prepare_proceeding(Processor_lazy_state *,
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Processor_lazy_state *) { }
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/**
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* Return wether to retry an undefined user instruction after this call
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*/
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bool retry_undefined_instr(Processor_lazy_state *) { return false; }
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};
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}
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/******************************
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** Arm_v7::Processor_driver **
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******************************/
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void Arm_v7::Processor_driver::finish_init_phys_kernel() { }
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#endif /* _PROCESSOR_DRIVER__CORTEX_A8_H_ */
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|
@ -1,5 +1,5 @@
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/*
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* \brief CPU driver for core
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* \brief Processor driver for core
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* \author Martin stein
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* \date 2011-11-03
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*/
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@ -23,15 +23,206 @@ namespace Cortex_a9
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using namespace Genode;
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/**
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* CPU driver for core
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* Part of processor state that is not switched on every mode transition
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*/
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struct Processor_driver : Arm_v7::Processor_driver
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{
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class Processor_lazy_state;
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|
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/**
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* Processor driver for core
|
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*/
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class Processor_driver;
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}
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class Cortex_a9::Processor_lazy_state
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{
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friend class Processor_driver;
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private:
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/* advanced FP/SIMD - system registers */
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uint32_t fpscr;
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uint32_t fpexc;
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/* advanced FP/SIMD - general purpose registers d0-d15 */
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uint64_t d0, d1, d2, d3, d4, d5, d6, d7;
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uint64_t d8, d9, d10, d11, d12, d13, d14, d15;
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public:
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/**
|
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* Constructor
|
||||
*/
|
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inline Processor_lazy_state();
|
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};
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class Cortex_a9::Processor_driver : public Arm_v7::Processor_driver
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{
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friend class Processor_lazy_state;
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private:
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/**
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* Coprocessor Access Control Register
|
||||
*/
|
||||
struct Cpacr : Register<32>
|
||||
{
|
||||
struct Cp10 : Bitfield<20, 2> { };
|
||||
struct Cp11 : Bitfield<22, 2> { };
|
||||
|
||||
/**
|
||||
* Read register value
|
||||
*/
|
||||
static access_t read()
|
||||
{
|
||||
access_t v;
|
||||
asm volatile ("mrc p15, 0, %[v], c1, c0, 2" : [v]"=r"(v) ::);
|
||||
return v;
|
||||
}
|
||||
|
||||
/**
|
||||
* Override register value
|
||||
*
|
||||
* \param v write value
|
||||
*/
|
||||
static void write(access_t const v)
|
||||
{
|
||||
asm volatile ("mcr p15, 0, %[v], c1, c0, 2" :: [v]"r"(v) :);
|
||||
}
|
||||
};
|
||||
|
||||
/**
|
||||
* Floating-point Status and Control Register
|
||||
*/
|
||||
struct Fpscr : Register<32>
|
||||
{
|
||||
/**
|
||||
* Read register value
|
||||
*/
|
||||
static access_t read()
|
||||
{
|
||||
/* FIXME: See annotation 1. */
|
||||
access_t v;
|
||||
asm volatile ("mrc p10, 7, %[v], cr1, cr0, 0" : [v] "=r" (v) ::);
|
||||
return v;
|
||||
}
|
||||
|
||||
/**
|
||||
* Override register value
|
||||
*
|
||||
* \param v write value
|
||||
*/
|
||||
static void write(access_t const v)
|
||||
{
|
||||
/* FIXME: See annotation 1. */
|
||||
asm volatile ("mcr p10, 7, %[v], cr1, cr0, 0" :: [v] "r" (v) :);
|
||||
}
|
||||
};
|
||||
|
||||
/**
|
||||
* Floating-Point Exception Control register
|
||||
*/
|
||||
struct Fpexc : Register<32>
|
||||
{
|
||||
struct En : Bitfield<30, 1> { };
|
||||
|
||||
/**
|
||||
* Read register value
|
||||
*/
|
||||
static access_t read()
|
||||
{
|
||||
/* FIXME: See annotation 1. */
|
||||
access_t v;
|
||||
asm volatile ("mrc p10, 7, %[v], cr8, cr0, 0" : [v] "=r" (v) ::);
|
||||
return v;
|
||||
}
|
||||
|
||||
/**
|
||||
* Override register value
|
||||
*
|
||||
* \param v write value
|
||||
*/
|
||||
static void write(access_t const v)
|
||||
{
|
||||
/* FIXME: See annotation 1. */
|
||||
asm volatile ("mcr p10, 7, %[v], cr8, cr0, 0" :: [v] "r" (v) :);
|
||||
}
|
||||
};
|
||||
|
||||
Processor_lazy_state * _advanced_fp_simd_state;
|
||||
|
||||
/**
|
||||
* Enable or disable the advanced FP/SIMD extension
|
||||
*
|
||||
* \param enabled wether to enable or to disable advanced FP/SIMD
|
||||
*/
|
||||
static void _toggle_advanced_fp_simd(bool const enabled)
|
||||
{
|
||||
Fpexc::access_t fpexc = Fpexc::read();
|
||||
Fpexc::En::set(fpexc, enabled);
|
||||
Fpexc::write(fpexc);
|
||||
}
|
||||
|
||||
/**
|
||||
* Save state of the advanced FP/SIMD extension to memory
|
||||
*
|
||||
* \param state processor state to save FP/SIMD state into
|
||||
*/
|
||||
static void
|
||||
_save_advanced_fp_simd_state(Processor_lazy_state * const state)
|
||||
{
|
||||
/* save system registers */
|
||||
state->fpexc = Fpexc::read();
|
||||
state->fpscr = Fpscr::read();
|
||||
|
||||
/*
|
||||
* Save D0 - D15
|
||||
*
|
||||
* FIXME: See annotation 2.
|
||||
*/
|
||||
void * const d0_d15_base = &state->d0;
|
||||
asm volatile (
|
||||
"stc p11, cr0, [%[d0_d15_base]], #128"
|
||||
:: [d0_d15_base] "r" (d0_d15_base) : );
|
||||
}
|
||||
|
||||
/**
|
||||
* Load state of the advanced FP/SIMD extension from memory
|
||||
*
|
||||
* \param state processor state to load FP/SIMD state out of
|
||||
*/
|
||||
static void
|
||||
_load_advanced_fp_simd_state(Processor_lazy_state * const state)
|
||||
{
|
||||
/* load system registers */
|
||||
Fpexc::write(state->fpexc);
|
||||
Fpscr::write(state->fpscr);
|
||||
|
||||
/*
|
||||
* Load D0 - D15
|
||||
*
|
||||
* FIXME: See annotation 2.
|
||||
*/
|
||||
void * const d0_d15_base = &state->d0;
|
||||
asm volatile (
|
||||
"ldc p11, cr0, [%[d0_d15_base]], #128"
|
||||
:: [d0_d15_base] "r" (d0_d15_base) : );
|
||||
}
|
||||
|
||||
/**
|
||||
* Return wether the advanced FP/SIMD extension is enabled
|
||||
*/
|
||||
static bool _advanced_fp_simd_enabled()
|
||||
{
|
||||
Fpexc::access_t fpexc = Fpexc::read();
|
||||
return Fpexc::En::get(fpexc);
|
||||
}
|
||||
|
||||
public:
|
||||
|
||||
enum
|
||||
{
|
||||
/* common */
|
||||
CLK = Board::CORTEX_A9_CLOCK, /* CPU interface clock */
|
||||
PERIPH_CLK = CLK, /* clock for CPU internal components */
|
||||
PERIPH_CLK = Board::CORTEX_A9_CLOCK,
|
||||
|
||||
/* interrupt controller */
|
||||
PL390_DISTRIBUTOR_MMIO_BASE = Board::CORTEX_A9_PRIVATE_MEM_BASE + 0x1000,
|
||||
@ -46,14 +237,104 @@ namespace Cortex_a9
|
||||
PRIVATE_TIMER_CLK = PERIPH_CLK
|
||||
};
|
||||
|
||||
/**
|
||||
* Constructor
|
||||
*/
|
||||
Processor_driver() : _advanced_fp_simd_state(0) { }
|
||||
|
||||
/**
|
||||
* Ensure that TLB insertions get applied
|
||||
*
|
||||
* Nothing to do because MMU uses caches on pagetable walks
|
||||
*/
|
||||
static void tlb_insertions() { }
|
||||
};
|
||||
|
||||
/**
|
||||
* Initialize advanced FP/SIMD extension
|
||||
*/
|
||||
static void init_advanced_fp_simd()
|
||||
{
|
||||
Cpacr::access_t cpacr = Cpacr::read();
|
||||
Cpacr::Cp10::set(cpacr, 3);
|
||||
Cpacr::Cp11::set(cpacr, 3);
|
||||
Cpacr::write(cpacr);
|
||||
_toggle_advanced_fp_simd(false);
|
||||
}
|
||||
|
||||
/**
|
||||
* Prepare for the proceeding of a user
|
||||
*
|
||||
* \param old_state processor state of the last user
|
||||
* \param new_state processor state of the next user
|
||||
*/
|
||||
static void prepare_proceeding(Processor_lazy_state * const old_state,
|
||||
Processor_lazy_state * const new_state)
|
||||
{
|
||||
if (old_state == new_state) { return; }
|
||||
_toggle_advanced_fp_simd(false);
|
||||
}
|
||||
|
||||
/**
|
||||
* Return wether to retry an undefined user instruction after this call
|
||||
*
|
||||
* \param state processor state of the user
|
||||
*/
|
||||
bool retry_undefined_instr(Processor_lazy_state * const state)
|
||||
{
|
||||
if (_advanced_fp_simd_enabled()) { return false; }
|
||||
_toggle_advanced_fp_simd(true);
|
||||
if (_advanced_fp_simd_state != state) {
|
||||
if (_advanced_fp_simd_state) {
|
||||
_save_advanced_fp_simd_state(_advanced_fp_simd_state);
|
||||
}
|
||||
_load_advanced_fp_simd_state(state);
|
||||
_advanced_fp_simd_state = state;
|
||||
}
|
||||
return true;
|
||||
}
|
||||
};
|
||||
|
||||
|
||||
/******************************
|
||||
** Arm_v7::Processor_driver **
|
||||
******************************/
|
||||
|
||||
void Arm_v7::Processor_driver::finish_init_phys_kernel()
|
||||
{
|
||||
Cortex_a9::Processor_driver::init_advanced_fp_simd();
|
||||
}
|
||||
|
||||
#endif /* _PROCESSOR_DRIVER__CORTEX_A9_H_ */
|
||||
|
||||
/*************************************
|
||||
** Cortex_a9::Processor_lazy_state **
|
||||
*************************************/
|
||||
|
||||
Cortex_a9::Processor_lazy_state::Processor_lazy_state()
|
||||
{
|
||||
fpexc = Processor_driver::Fpexc::En::bits(1);
|
||||
}
|
||||
|
||||
|
||||
/*****************
|
||||
** Annotations **
|
||||
*****************/
|
||||
|
||||
/*
|
||||
* Annotation 1
|
||||
*
|
||||
* According to the ARMv7 manual this should be done via vmsr/vmrs instruction
|
||||
* but it seems that binutils 2.22 doesn't fully support this yet. Hence, we
|
||||
* use a co-processor instruction instead. The parameters to target the
|
||||
* register this way can be determined via 'sys/arm/include/vfp.h' and
|
||||
* 'sys/arm/arm/vfp.c' of the FreeBSD head branch as from 2014.04.17.
|
||||
*/
|
||||
|
||||
/*
|
||||
* Annotation 2
|
||||
*
|
||||
* According to the ARMv7 manual this should be done via vldm/vstm instruction
|
||||
* but it seems that binutils 2.22 doesn't fully support this yet. Hence, we
|
||||
* use a co-processor instruction instead. The parameters to target the
|
||||
* register this way can be determined via 'sys/arm/arm/vfp.c' of the FreeBSD
|
||||
* head branch as from 2014.04.17.
|
||||
*/
|
||||
|
||||
#endif /* _PROCESSOR_DRIVER__CORTEX_A9_H_ */
|
||||
|
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* \brief CPU definition for Raspberry Pi
|
||||
* \brief Processor driver for core
|
||||
* \author Norman Feske
|
||||
* \date 2013-04-11
|
||||
*/
|
||||
@ -17,9 +17,11 @@
|
||||
/* core includes */
|
||||
#include <processor_driver/arm_v6.h>
|
||||
|
||||
namespace Genode { class Processor_driver : public Arm_v6::Processor_driver { }; }
|
||||
|
||||
namespace Kernel { typedef Genode::Processor_driver Processor_driver; }
|
||||
namespace Genode
|
||||
{
|
||||
using Arm_v6::Processor_lazy_state;
|
||||
using Arm_v6::Processor_driver;
|
||||
}
|
||||
|
||||
#endif /* _RPI__PROCESSOR_DRIVER_H_ */
|
||||
|
||||
|
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* \brief CPU driver for core
|
||||
* \brief Processor driver for core
|
||||
* \author Martin Stein
|
||||
* \date 2012-04-23
|
||||
*/
|
||||
@ -19,8 +19,10 @@
|
||||
|
||||
namespace Genode
|
||||
{
|
||||
using Cortex_a9::Processor_lazy_state;
|
||||
|
||||
/**
|
||||
* CPU driver for core
|
||||
* Processor driver for core
|
||||
*/
|
||||
class Processor_driver : public Cortex_a9::Processor_driver
|
||||
{
|
||||
@ -38,7 +40,4 @@ namespace Genode
|
||||
};
|
||||
}
|
||||
|
||||
namespace Kernel { typedef Genode::Processor_driver Processor_driver; }
|
||||
|
||||
#endif /* _VEA9X4__PROCESSOR_DRIVER_H_ */
|
||||
|
||||
|
Loading…
x
Reference in New Issue
Block a user