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base-hw: save/restore fpcr register for ARM_V8

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The floating-point (fpcr) control register is user land accessible and
controls, for example, rounding mode.

fixes #3723 and related to #4213
This commit is contained in:
Sebastian Sumpf 2021-07-02 11:05:34 +02:00 committed by Christian Helmuth
parent 688379d1ed
commit 4b10aa94ec
2 changed files with 7 additions and 4 deletions
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3
repos/base-hw/src/core/spec/arm_v8/cpu.h
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@ -56,7 +56,8 @@ struct Genode::Cpu : Hw::Arm_64_cpu
struct alignas(16) Fpu_state
{
Genode::uint128_t q[32];
Genode::uint32_t fpsr;
Genode::uint64_t fpsr;
Genode::uint64_t fpcr;
};
struct alignas(8) Context : Cpu_state

8
repos/base-hw/src/core/spec/arm_v8/exception_vector.s
View File

@ -60,8 +60,9 @@ _kernel_entry:
stp q26, q27, [x0], #32
stp q28, q29, [x0], #32
stp q30, q31, [x0], #32
mrs x1, fpcr
mrs x2, fpsr
str x2, [x0]
stp x1, x2, [x0], #16
msr fpsr, xzr
ldr x0, [sp, #-16]
ldr x1, [sp, #-32]
@ -111,8 +112,9 @@ _kernel_entry:
ldp q26, q27, [x1], #32
ldp q28, q29, [x1], #32
ldp q30, q31, [x1], #32
ldr x1, [x1]
msr fpsr, x1
ldp x2, x3, [x1], #16
msr fpcr, x2
msr fpsr, x3
add x0, x0, #8
ldp x1, x2, [x0], #16
ldp x3, x4, [x0], #16