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base-hw: Address-Space-ID allocator as Main member

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Let the kernel's Address-Space-ID allocator be a member of the one
Kernel::Main object instead of having it as global static variable.

Ref #4217
This commit is contained in:
Martin Stein 2021-07-20 18:19:15 +02:00 committed by Norman Feske
parent 0c61b25bcf
commit 441d137482
37 changed files with 414 additions and 177 deletions
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4
repos/base-hw/src/core/board/imx53_qsb/board.h
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@ -15,10 +15,14 @@
#ifndef _CORE__SPEC__IMX53_QSB__BOARD_H_
#define _CORE__SPEC__IMX53_QSB__BOARD_H_
/* base-hw internal includes */
#include <hw/spec/arm/imx_tzic.h>
#include <hw/spec/arm/imx53_qsb_board.h>
/* base-hw Core includes */
#include <spec/arm/imx_epit.h>
#include <spec/arm/trustzone_board.h>
#include <spec/arm/address_space_id_allocator.h>
namespace Board { using namespace Hw::Imx53_qsb_board; }

4
repos/base-hw/src/core/board/imx6q_sabrelite/board.h
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@ -14,9 +14,13 @@
#ifndef _CORE__SPEC__IMX6Q_SABRELITE__BOARD_H_
#define _CORE__SPEC__IMX6Q_SABRELITE__BOARD_H_
/* base-hw internal includes */
#include <hw/spec/arm/gicv2.h>
#include <hw/spec/arm/imx6q_sabrelite_board.h>
/* base-hw Core includes */
#include <spec/arm/cortex_a9_private_timer.h>
#include <spec/arm/address_space_id_allocator.h>
namespace Board {

4
repos/base-hw/src/core/board/imx7d_sabre/board.h
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@ -14,11 +14,15 @@
#ifndef _CORE__SPEC__IMX7D_SABRE__BOARD_H_
#define _CORE__SPEC__IMX7D_SABRE__BOARD_H_
/* base-hw internal includes */
#include <hw/spec/arm/imx7d_sabre_board.h>
/* base-hw Core includes */
#include <spec/arm/virtualization/gicv2.h>
#include <spec/arm/generic_timer.h>
#include <spec/arm/cpu/vm_state_virtualization.h>
#include <spec/arm/virtualization/board.h>
#include <spec/arm/address_space_id_allocator.h>
namespace Board {

8
repos/base-hw/src/core/board/imx8q_evk/board.h
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@ -14,10 +14,18 @@
#ifndef _CORE__SPEC__IMX8Q_EVK__BOARD_H_
#define _CORE__SPEC__IMX8Q_EVK__BOARD_H_
/* base-hw internal includes */
#include <hw/spec/arm_64/imx8q_evk_board.h>
/* base-hw Core includes */
#include <spec/arm/generic_timer.h>
#include <spec/arm/virtualization/gicv3.h>
#include <spec/arm_v8/address_space_id_allocator.h>
/* base-hw includes */
#include <spec/arm_64/cpu/vm_state_virtualization.h>
/* base-hw Core includes */
#include <spec/arm/virtualization/board.h>
namespace Board {

4
repos/base-hw/src/core/board/nit6_solox/board.h
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@ -14,9 +14,13 @@
#ifndef _CORE__SPEC__NIT6_SOLOX__BOARD_H_
#define _CORE__SPEC__NIT6_SOLOX__BOARD_H_
/* base-hw internal includes */
#include <hw/spec/arm/gicv2.h>
#include <hw/spec/arm/nit6_solox_board.h>
/* base-hw Core includes */
#include <spec/arm/cortex_a9_private_timer.h>
#include <spec/arm/address_space_id_allocator.h>
namespace Board {

4
repos/base-hw/src/core/board/pbxa9/board.h
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@ -14,9 +14,13 @@
#ifndef _CORE__SPEC__PBXA9__BOARD_H_
#define _CORE__SPEC__PBXA9__BOARD_H_
/* base-hw internal includes */
#include <hw/spec/arm/gicv2.h>
#include <hw/spec/arm/pbxa9_board.h>
/* base-hw Core includes */
#include <spec/arm/cortex_a9_private_timer.h>
#include <spec/arm/address_space_id_allocator.h>
namespace Board {

3
repos/base-hw/src/core/board/pc/board.h
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@ -17,9 +17,10 @@
/* base-hw internal includes */
#include <hw/spec/x86_64/pc_board.h>
/* base-hw internal includes */
/* base-hw Core includes */
#include <spec/x86_64/pic.h>
#include <spec/x86_64/pit.h>
#include <spec/x86_64/address_space_id_allocator.h>
namespace Board {

6
repos/base-hw/src/core/board/riscv_qemu/board.h
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@ -14,12 +14,16 @@
#ifndef _CORE__SPEC__RISCV_QEMU__BOARD_H_
#define _CORE__SPEC__RISCV_QEMU__BOARD_H_
/* base-hw internal includes */
#include <hw/spec/riscv/qemu_board.h>
/* base-hw Core includes */
#include <spec/riscv/pic.h>
#include <spec/riscv/address_space_id_allocator.h>
namespace Board { using namespace Hw::Riscv_board; }
/* base-hw Core includes */
#include <spec/riscv/timer.h>

4
repos/base-hw/src/core/board/rpi/board.h
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@ -15,9 +15,13 @@
#ifndef _CORE__SPEC__RPI__BOARD_H_
#define _CORE__SPEC__RPI__BOARD_H_
/* base-hw internal includes */
#include <hw/spec/arm/rpi_board.h>
/* base-hw Core includes */
#include <spec/arm/bcm2835_pic.h>
#include <spec/arm/bcm2835_system_timer.h>
#include <spec/arm/address_space_id_allocator.h>
namespace Board { using namespace Hw::Rpi_board; };

4
repos/base-hw/src/core/board/rpi3/board.h
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@ -14,9 +14,13 @@
#ifndef _CORE__SPEC__RPI3__BOARD_H_
#define _CORE__SPEC__RPI3__BOARD_H_
/* base-hw internal includes */
#include <hw/spec/arm_64/rpi3_board.h>
/* base-hw Core includes */
#include <spec/arm/bcm2837_pic.h>
#include <spec/arm/generic_timer.h>
#include <spec/arm_v8/address_space_id_allocator.h>
namespace Board {

4
repos/base-hw/src/core/board/usb_armory/board.h
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@ -15,10 +15,14 @@
#ifndef _CORE__SPEC__USB_ARMORY__BOARD_H_
#define _CORE__SPEC__USB_ARMORY__BOARD_H_
/* base-hw internal includes */
#include <hw/spec/arm/imx_tzic.h>
#include <hw/spec/arm/usb_armory_board.h>
/* base-hw Core includes */
#include <spec/arm/imx_epit.h>
#include <spec/arm/trustzone_board.h>
#include <spec/arm/address_space_id_allocator.h>
namespace Board { using namespace Hw::Usb_armory_board; }

8
repos/base-hw/src/core/board/virt_qemu/board.h
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@ -14,11 +14,19 @@
#ifndef _SRC__CORE__SPEC__VIRT__QEMU_H_
#define _SRC__CORE__SPEC__VIRT__QEMU_H_
/* base-hw internal includes */
#include <hw/spec/arm/virt_qemu_board.h>
/* base-hw Core includes */
#include <spec/arm/virtualization/gicv2.h>
#include <spec/arm/generic_timer.h>
/* base-hw includes */
#include <spec/arm/cpu/vm_state_virtualization.h>
/* base-hw Core includes */
#include <spec/arm/virtualization/board.h>
#include <spec/arm/address_space_id_allocator.h>
namespace Kernel { class Cpu; }

8
repos/base-hw/src/core/board/virt_qemu_64/board.h
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@ -14,13 +14,21 @@
#ifndef _SRC__CORE__SPEC__VIRT_QEMU_64_H_
#define _SRC__CORE__SPEC__VIRT_QEMU_64_H_
/* base-hw internal includes */
#include <hw/spec/arm/virt_qemu_board.h>
/* base-hw Core includes */
#include <spec/arm/generic_timer.h>
#include <spec/arm/virtualization/gicv3.h>
/* base-hw includes */
#include <spec/arm_64/cpu/vm_state_virtualization.h>
/* base-hw Core includes */
#include <translation_table.h>
#include <kernel/configuration.h>
#include <kernel/irq.h>
#include <spec/arm_v8/address_space_id_allocator.h>
namespace Board {

4
repos/base-hw/src/core/board/wand_quad/board.h
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@ -15,9 +15,13 @@
#ifndef _CORE__SPEC__WAND_QUAD__BOARD_H_
#define _CORE__SPEC__WAND_QUAD__BOARD_H_
/* base-hw internal includes */
#include <hw/spec/arm/gicv2.h>
#include <hw/spec/arm/wand_quad_board.h>
/* base-hw Core includes */
#include <spec/arm/cortex_a9_private_timer.h>
#include <spec/arm/address_space_id_allocator.h>
namespace Board {

4
repos/base-hw/src/core/board/zynq_qemu/board.h
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@ -16,9 +16,13 @@
#ifndef _CORE__SPEC__ZYNQ_QEMU__BOARD_H_
#define _CORE__SPEC__ZYNQ_QEMU__BOARD_H_
/* base-hw internal includes */
#include <hw/spec/arm/gicv2.h>
#include <hw/spec/arm/zynq_qemu_board.h>
/* base-hw Core includes */
#include <spec/arm/cortex_a9_private_timer.h>
#include <spec/arm/address_space_id_allocator.h>
namespace Board {

33
repos/base-hw/src/core/kernel/cpu.cc
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@ -103,12 +103,13 @@ Cpu_job::~Cpu_job()
extern "C" void idle_thread_main(void);
Cpu::Idle_thread::Idle_thread(Irq::Pool &user_irq_pool,
Cpu_pool &cpu_pool,
Cpu &cpu,
Pd &core_pd)
Cpu::Idle_thread::Idle_thread(Board::Address_space_id_allocator &addr_space_id_alloc,
Irq::Pool &user_irq_pool,
Cpu_pool &cpu_pool,
Cpu &cpu,
Pd &core_pd)
:
Thread { user_irq_pool, cpu_pool, core_pd, "idle" }
Thread { addr_space_id_alloc, user_irq_pool, cpu_pool, core_pd, "idle" }
{
regs->ip = (addr_t)&idle_thread_main;
@ -173,15 +174,17 @@ addr_t Cpu::stack_start()
}
Cpu::Cpu(unsigned const id,
Irq::Pool &user_irq_pool,
Cpu_pool &cpu_pool,
Pd &core_pd)
Cpu::Cpu(unsigned const id,
Board::Address_space_id_allocator &addr_space_id_alloc,
Irq::Pool &user_irq_pool,
Cpu_pool &cpu_pool,
Pd &core_pd)
:
_id { id },
_timer { *this },
_scheduler { _idle, _quota(), _fill() },
_idle { user_irq_pool, cpu_pool, *this, core_pd },
_idle { addr_space_id_alloc, user_irq_pool, cpu_pool, *this,
core_pd },
_ipi_irq { *this },
_global_work_list { cpu_pool.work_list() }
{
@ -193,11 +196,15 @@ Cpu::Cpu(unsigned const id,
** Cpu_pool **
**************/
void Cpu_pool::initialize_executing_cpu(Irq::Pool &user_irq_pool,
Pd &core_pd)
void
Cpu_pool::
initialize_executing_cpu(Board::Address_space_id_allocator &addr_space_id_alloc,
Irq::Pool &user_irq_pool,
Pd &core_pd)
{
unsigned id = Cpu::executing_id();
_cpus[id].construct(id, user_irq_pool, *this, core_pd);
_cpus[id].construct(
id, addr_space_id_alloc, user_irq_pool, *this, core_pd);
}

24
repos/base-hw/src/core/kernel/cpu.h
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@ -102,10 +102,11 @@ class Kernel::Cpu : public Genode::Cpu, private Irq::Pool, private Timeout
/**
* Construct idle context for CPU 'cpu'
*/
Idle_thread(Irq::Pool &user_irq_pool,
Cpu_pool &cpu_pool,
Cpu &cpu,
Pd &core_pd);
Idle_thread(Board::Address_space_id_allocator &addr_space_id_alloc,
Irq::Pool &user_irq_pool,
Cpu_pool &cpu_pool,
Cpu &cpu,
Pd &core_pd);
};
@ -130,10 +131,11 @@ class Kernel::Cpu : public Genode::Cpu, private Irq::Pool, private Timeout
/**
* Construct object for CPU 'id'
*/
Cpu(unsigned const id,
Irq::Pool &user_irq_pool,
Cpu_pool &cpu_pool,
Pd &core_pd);
Cpu(unsigned const id,
Board::Address_space_id_allocator &addr_space_id_alloc,
Irq::Pool &user_irq_pool,
Cpu_pool &cpu_pool,
Pd &core_pd);
static inline unsigned primary_id() { return 0; }
@ -204,8 +206,10 @@ class Kernel::Cpu_pool
Cpu_pool(unsigned nr_of_cpus);
void initialize_executing_cpu(Irq::Pool &user_irq_pool,
Pd &core_pd);
void
initialize_executing_cpu(Board::Address_space_id_allocator &addr_space_id_alloc,
Irq::Pool &user_irq_pool,
Pd &core_pd);
/**
* Return object of CPU 'id'

11
repos/base-hw/src/core/kernel/main.cc
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@ -45,11 +45,12 @@ class Kernel::Main
static Main *_instance;
Lock _data_lock { };
Lock _data_lock { };
Cpu_pool _cpu_pool;
Irq::Pool _user_irq_pool { };
Genode::Core_platform_pd _core_platform_pd { };
Genode::Constructible<Core_main_thread> _core_main_thread { };
Irq::Pool _user_irq_pool { };
Board::Address_space_id_allocator _addr_space_id_alloc { };
Genode::Core_platform_pd _core_platform_pd { _addr_space_id_alloc };
Genode::Constructible<Core_main_thread> _core_main_thread { };
void _handle_kernel_entry();
@ -134,6 +135,7 @@ void Kernel::main_initialize_and_handle_kernel_entry()
Lock::Guard guard(Main::_instance->_data_lock);
instance_initialized = true;
Main::_instance->_cpu_pool.initialize_executing_cpu(
Main::_instance->_addr_space_id_alloc,
Main::_instance->_user_irq_pool,
Main::_instance->_core_platform_pd.kernel_pd());
@ -161,6 +163,7 @@ void Kernel::main_initialize_and_handle_kernel_entry()
boot_info.kernel_irqs.add((unsigned)Board::Pic::IPI);
Main::_instance->_core_main_thread.construct(
Main::_instance->_addr_space_id_alloc,
Main::_instance->_user_irq_pool,
Main::_instance->_cpu_pool,
Main::_instance->_core_platform_pd.kernel_pd());

9
repos/base-hw/src/core/kernel/pd.h
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@ -65,10 +65,13 @@ class Kernel::Pd
* \param table translation table of the PD
* \param platform_pd core object of the PD
*/
Pd(Hw::Page_table &table,
Genode::Platform_pd &platform_pd)
Pd(Hw::Page_table &table,
Genode::Platform_pd &platform_pd,
Board::Address_space_id_allocator &addr_space_id_alloc)
:
_table(table), _platform_pd(platform_pd), mmu_regs((addr_t)&table)
_table(table),
_platform_pd(platform_pd),
mmu_regs((addr_t)&table, addr_space_id_alloc)
{
capid_t invalid = _capid_alloc.alloc();
assert(invalid == cap_id_invalid());

58
repos/base-hw/src/core/kernel/thread.cc
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@ -771,14 +771,14 @@ void Thread::_call()
/* switch over kernel calls that are restricted to core */
switch (call_id) {
case call_id_new_thread():
_call_new<Thread>(_user_irq_pool, _cpu_pool, _core_pd,
(unsigned) user_arg_2(),
_call_new<Thread>(_addr_space_id_alloc, _user_irq_pool, _cpu_pool,
_core_pd, (unsigned) user_arg_2(),
(unsigned) _core_to_kernel_quota(user_arg_3()),
(char const *) user_arg_4());
return;
case call_id_new_core_thread():
_call_new<Thread>(_user_irq_pool, _cpu_pool, _core_pd,
(char const *) user_arg_2());
_call_new<Thread>(_addr_space_id_alloc, _user_irq_pool, _cpu_pool,
_core_pd, (char const *) user_arg_2());
return;
case call_id_thread_quota(): _call_thread_quota(); return;
case call_id_delete_thread(): _call_delete_thread(); return;
@ -788,7 +788,8 @@ void Thread::_call()
case call_id_invalidate_tlb(): _call_invalidate_tlb(); return;
case call_id_new_pd():
_call_new<Pd>(*(Hw::Page_table *) user_arg_2(),
*(Genode::Platform_pd *) user_arg_3());
*(Genode::Platform_pd *) user_arg_3(),
_addr_space_id_alloc);
return;
case call_id_delete_pd(): _call_delete<Pd>(); return;
case call_id_new_signal_receiver(): _call_new<Signal_receiver>(); return;
@ -835,24 +836,26 @@ void Thread::_mmu_exception()
}
Thread::Thread(Irq::Pool &user_irq_pool,
Cpu_pool &cpu_pool,
Pd &core_pd,
unsigned const priority,
unsigned const quota,
char const *const label,
bool core)
Thread::Thread(Board::Address_space_id_allocator &addr_space_id_alloc,
Irq::Pool &user_irq_pool,
Cpu_pool &cpu_pool,
Pd &core_pd,
unsigned const priority,
unsigned const quota,
char const *const label,
bool core)
:
Kernel::Object { *this },
Cpu_job { priority, quota },
_user_irq_pool { user_irq_pool },
_cpu_pool { cpu_pool },
_core_pd { core_pd },
_ipc_node { *this },
_state { AWAITS_START },
_label { label },
_core { core },
regs { core }
Kernel::Object { *this },
Cpu_job { priority, quota },
_addr_space_id_alloc { addr_space_id_alloc },
_user_irq_pool { user_irq_pool },
_cpu_pool { cpu_pool },
_core_pd { core_pd },
_ipc_node { *this },
_state { AWAITS_START },
_label { label },
_core { core },
regs { core }
{ }
@ -874,11 +877,14 @@ Genode::uint8_t __initial_stack_base[DEFAULT_STACK_SIZE];
** Core_main_thread **
**********************/
Core_main_thread::Core_main_thread(Irq::Pool &user_irq_pool,
Cpu_pool &cpu_pool,
Pd &core_pd)
Core_main_thread::
Core_main_thread(Board::Address_space_id_allocator &addr_space_id_alloc,
Irq::Pool &user_irq_pool,
Cpu_pool &cpu_pool,
Pd &core_pd)
:
Core_object<Thread>(core_pd, user_irq_pool, cpu_pool, core_pd, "core")
Core_object<Thread>(
core_pd, addr_space_id_alloc, user_irq_pool, cpu_pool, core_pd, "core")
{
using namespace Genode;

74
repos/base-hw/src/core/kernel/thread.h
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@ -131,25 +131,26 @@ class Kernel::Thread : private Kernel::Object, public Cpu_job, private Timeout
enum { MAX_RCV_CAPS = Genode::Msgbuf_base::MAX_CAPS_PER_MSG };
Irq::Pool &_user_irq_pool;
Cpu_pool &_cpu_pool;
Pd &_core_pd;
void *_obj_id_ref_ptr[MAX_RCV_CAPS] { nullptr };
Ipc_node _ipc_node;
capid_t _ipc_capid { cap_id_invalid() };
size_t _ipc_rcv_caps { 0 };
Genode::Native_utcb *_utcb { nullptr };
Pd *_pd { nullptr };
Signal_context *_pager { nullptr };
Thread_fault _fault { };
State _state;
Signal_handler _signal_handler { *this };
Signal_context_killer _signal_context_killer { *this };
char const *const _label;
capid_t _timeout_sigid { 0 };
bool _paused { false };
bool _cancel_next_await_signal { false };
bool const _core { false };
Board::Address_space_id_allocator &_addr_space_id_alloc;
Irq::Pool &_user_irq_pool;
Cpu_pool &_cpu_pool;
Pd &_core_pd;
void *_obj_id_ref_ptr[MAX_RCV_CAPS] { nullptr };
Ipc_node _ipc_node;
capid_t _ipc_capid { cap_id_invalid() };
size_t _ipc_rcv_caps { 0 };
Genode::Native_utcb *_utcb { nullptr };
Pd *_pd { nullptr };
Signal_context *_pager { nullptr };
Thread_fault _fault { };
State _state;
Signal_handler _signal_handler { *this };
Signal_context_killer _signal_context_killer { *this };
char const *const _label;
capid_t _timeout_sigid { 0 };
bool _paused { false };
bool _cancel_next_await_signal { false };
bool const _core { false };
Genode::Constructible<Tlb_invalidation> _tlb_invalidation {};
Genode::Constructible<Destroy> _destroy {};
@ -294,26 +295,28 @@ class Kernel::Thread : private Kernel::Object, public Cpu_job, private Timeout
* \param label debugging label
* \param core whether it is a core thread or not
*/
Thread(Irq::Pool &user_irq_pool,
Cpu_pool &cpu_pool,
Pd &core_pd,
unsigned const priority,
unsigned const quota,
char const *const label,
bool core = false);
Thread(Board::Address_space_id_allocator &addr_space_id_alloc,
Irq::Pool &user_irq_pool,
Cpu_pool &cpu_pool,
Pd &core_pd,
unsigned const priority,
unsigned const quota,
char const *const label,
bool core = false);
/**
* Constructor for core/kernel thread
*
* \param label debugging label
*/
Thread(Irq::Pool &user_irq_pool,
Cpu_pool &cpu_pool,
Pd &core_pd,
char const *const label)
Thread(Board::Address_space_id_allocator &addr_space_id_alloc,
Irq::Pool &user_irq_pool,
Cpu_pool &cpu_pool,
Pd &core_pd,
char const *const label)
:
Thread(user_irq_pool, cpu_pool, core_pd, Cpu_priority::min(), 0,
label, true)
Thread(addr_space_id_alloc, user_irq_pool, cpu_pool, core_pd,
Cpu_priority::min(), 0, label, true)
{ }
~Thread();
@ -451,9 +454,10 @@ class Kernel::Core_main_thread : public Core_object<Kernel::Thread>
public:
Core_main_thread(Irq::Pool &user_irq_pool,
Cpu_pool &cpu_pool,
Pd &core_pd);
Core_main_thread(Board::Address_space_id_allocator &addr_space_id_alloc,
Irq::Pool &user_irq_pool,
Cpu_pool &cpu_pool,
Pd &core_pd);
};
#endif /* _CORE__KERNEL__THREAD_H_ */

23
repos/base-hw/src/core/platform_pd.cc
View File

@ -89,16 +89,18 @@ void Hw::Address_space::flush(addr_t virt, size_t size, Core_local_addr)
}
Hw::Address_space::Address_space(Page_table & tt,
Page_table::Allocator & tt_alloc,
Platform_pd & pd)
Hw::Address_space::
Address_space(Page_table &tt,
Page_table::Allocator &tt_alloc,
Platform_pd &pd,
Board::Address_space_id_allocator &addr_space_id_alloc)
:
_tt(tt),
_tt_phys(Platform::core_page_table()),
_tt_alloc(tt_alloc),
_kobj(_kobj.CALLED_FROM_KERNEL,
*(Page_table*)translation_table_phys(),
pd)
pd, addr_space_id_alloc)
{ }
@ -160,10 +162,12 @@ void Platform_pd::assign_parent(Native_capability parent)
}
Platform_pd::Platform_pd(Page_table & tt,
Page_table::Allocator & alloc)
Platform_pd::
Platform_pd(Page_table &tt,
Page_table::Allocator &alloc,
Board::Address_space_id_allocator &addr_space_id_alloc)
:
Hw::Address_space(tt, alloc, *this), _label("core")
Hw::Address_space(tt, alloc, *this, addr_space_id_alloc), _label("core")
{ }
@ -189,8 +193,9 @@ Platform_pd::~Platform_pd()
** Core_platform_pd implementation **
*************************************/
Core_platform_pd::Core_platform_pd()
Core_platform_pd::
Core_platform_pd(Board::Address_space_id_allocator &addr_space_id_alloc)
:
Platform_pd(*(Hw::Page_table*)Hw::Mm::core_page_tables().base,
Platform::core_page_table_allocator())
Platform::core_page_table_allocator(), addr_space_id_alloc)
{ }

14
repos/base-hw/src/core/platform_pd.h
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@ -94,9 +94,10 @@ class Hw::Address_space : public Genode::Address_space
* \param tt_alloc reference to translation table allocator
* \param pd reference to platform pd object
*/
Address_space(Hw::Page_table & tt,
Hw::Page_table::Allocator & tt_alloc,
Platform_pd & pd);
Address_space(Hw::Page_table &tt,
Hw::Page_table::Allocator &tt_alloc,
Platform_pd &pd,
Board::Address_space_id_allocator &addr_space_id_alloc);
public:
@ -187,8 +188,9 @@ class Genode::Platform_pd : public Hw::Address_space,
* \param tt translation table address
* \param tt_alloc translation table allocator
*/
Platform_pd(Hw::Page_table & tt,
Hw::Page_table::Allocator & tt_alloc);
Platform_pd(Hw::Page_table &tt,
Hw::Page_table::Allocator &tt_alloc,
Board::Address_space_id_allocator &addr_space_id_alloc);
public:
@ -229,7 +231,7 @@ class Genode::Platform_pd : public Hw::Address_space,
struct Genode::Core_platform_pd : Genode::Platform_pd
{
Core_platform_pd();
Core_platform_pd(Board::Address_space_id_allocator &addr_space_id_alloc);
};
#endif /* _CORE__PLATFORM_PD_H_ */

25
repos/base-hw/src/core/spec/arm/address_space_id_allocator.h Normal file
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@ -0,0 +1,25 @@
/*
* \brief Allocator for hardware-specific address-space identifiers
* \author Martin Stein
* \date 2021-07-21
*/
/*
* Copyright (C) 2021 Genode Labs GmbH
*
* This file is part of the Genode OS framework, which is distributed
* under the terms of the GNU Affero General Public License version 3.
*/
#ifndef _ARM__ADDRESS_SPACE_ID_ALLOCATOR_H_
#define _ARM__ADDRESS_SPACE_ID_ALLOCATOR_H_
/* base includes */
#include <util/bit_allocator.h>
namespace Board {
class Address_space_id_allocator : public Genode::Bit_allocator<256> { };
}
#endif /* _ARM__ADDRESS_SPACE_ID_ALLOCATOR_H_ */

22
repos/base-hw/src/core/spec/arm/cpu.cc
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@ -11,10 +11,10 @@
* under the terms of the GNU Affero General Public License version 3.
*/
#include <util/bit_allocator.h>
/* base includes */
#include <cpu/memory_barrier.h>
#include <base/internal/unmanaged_singleton.h>
/* base-hw Core includes */
#include <kernel/cpu.h>
#include <kernel/thread.h>
#include <spec/arm/cpu_support.h>
@ -36,21 +36,21 @@ Arm_cpu::Context::Context(bool privileged)
}
using Asid_allocator = Bit_allocator<256>;
static Asid_allocator &alloc() {
return *unmanaged_singleton<Asid_allocator>(); }
Arm_cpu::Mmu_context::Mmu_context(addr_t table)
: cidr((uint8_t)alloc().alloc()), ttbr0(Ttbr::init(table)) { }
Arm_cpu::Mmu_context::
Mmu_context(addr_t table,
Board::Address_space_id_allocator &addr_space_id_alloc)
:
_addr_space_id_alloc(addr_space_id_alloc),
cidr((uint8_t)_addr_space_id_alloc.alloc()),
ttbr0(Ttbr::init(table))
{ }
Genode::Arm_cpu::Mmu_context::~Mmu_context()
{
/* flush TLB by ASID */
Cpu::Tlbiasid::write(id());
alloc().free(id());
_addr_space_id_alloc.free(id());
}

20
repos/base-hw/src/core/spec/arm/cpu_support.h
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@ -52,15 +52,23 @@ struct Genode::Arm_cpu : public Hw::Arm_cpu
/**
* This class comprises ARM specific protection domain attributes
*/
struct Mmu_context
class Mmu_context
{
Cidr::access_t cidr;
Ttbr0::access_t ttbr0;
private:
Mmu_context(addr_t page_table_base);
~Mmu_context();
Board::Address_space_id_allocator &_addr_space_id_alloc;
uint8_t id() { return cidr; }
public:
Cidr::access_t cidr;
Ttbr0::access_t ttbr0;
Mmu_context(addr_t page_table_base,
Board::Address_space_id_allocator &addr_space_id_alloc);
~Mmu_context();
uint8_t id() { return cidr; }
};
/**

25
repos/base-hw/src/core/spec/arm_v8/address_space_id_allocator.h Normal file
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@ -0,0 +1,25 @@
/*
* \brief Allocator for hardware-specific address-space identifiers
* \author Martin Stein
* \date 2021-07-21
*/
/*
* Copyright (C) 2021 Genode Labs GmbH
*
* This file is part of the Genode OS framework, which is distributed
* under the terms of the GNU Affero General Public License version 3.
*/
#ifndef _ARM_V8__ADDRESS_SPACE_ID_ALLOCATOR_H_
#define _ARM_V8__ADDRESS_SPACE_ID_ALLOCATOR_H_
/* base includes */
#include <util/bit_allocator.h>
namespace Board {
class Address_space_id_allocator : public Genode::Bit_allocator<65536> { };
}
#endif /* _ARM_V8__ADDRESS_SPACE_ID_ALLOCATOR_H_ */

19
repos/base-hw/src/core/spec/arm_v8/cpu.cc
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@ -15,9 +15,6 @@
#include <util/bit_allocator.h>
#include <cpu/memory_barrier.h>
/* base-internal includes */
#include <base/internal/unmanaged_singleton.h>
/* base-hw Core includes */
#include <board.h>
#include <cpu.h>
@ -61,24 +58,20 @@ void Genode::Cpu::mmu_fault(Genode::Cpu::Context &,
}
using Asid_allocator = Genode::Bit_allocator<65536>;
static Asid_allocator &alloc() {
return *unmanaged_singleton<Asid_allocator>(); }
Genode::Cpu::Mmu_context::Mmu_context(addr_t table)
Genode::Cpu::Mmu_context::
Mmu_context(addr_t table,
Board::Address_space_id_allocator &addr_space_id_alloc)
:
_addr_space_id_alloc(addr_space_id_alloc),
ttbr(Ttbr::Baddr::masked(table))
{
Ttbr::Asid::set(ttbr, (Genode::uint16_t)alloc().alloc());
Ttbr::Asid::set(ttbr, (Genode::uint16_t)_addr_space_id_alloc.alloc());
}
Genode::Cpu::Mmu_context::~Mmu_context()
{
alloc().free(id());
_addr_space_id_alloc.free(id());
}

23
repos/base-hw/src/core/spec/arm_v8/cpu.h
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@ -23,6 +23,9 @@
namespace Kernel { struct Thread_fault; }
namespace Board { class Address_space_id_allocator; }
namespace Genode {
struct Cpu;
@ -69,15 +72,23 @@ struct Genode::Cpu : Hw::Arm_64_cpu
Context(bool privileged);
};
struct Mmu_context
class Mmu_context
{
Ttbr::access_t ttbr;
private:
Mmu_context(addr_t page_table_base);
~Mmu_context();
Board::Address_space_id_allocator &_addr_space_id_alloc;
Genode::uint16_t id() {
return Ttbr::Asid::get(ttbr); }
public:
Ttbr::access_t ttbr;
Mmu_context(addr_t page_table_base,
Board::Address_space_id_allocator &addr_space_id_alloc);
~Mmu_context();
Genode::uint16_t id() {
return Ttbr::Asid::get(ttbr); }
};
void switch_to(Context&, Mmu_context &);

19
repos/base-hw/src/core/spec/cortex_a15/cpu.cc
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@ -11,24 +11,19 @@
* under the terms of the GNU Affero General Public License version 3.
*/
#include <util/bit_allocator.h>
#include <base/internal/unmanaged_singleton.h>
/* base-hw Core includes */
#include <kernel/thread.h>
#include <spec/cortex_a15/cpu.h>
using Asid_allocator = Genode::Bit_allocator<256>;
static Asid_allocator &alloc() {
return *unmanaged_singleton<Asid_allocator>(); }
Genode::Cpu::Mmu_context::Mmu_context(addr_t table)
Genode::Cpu::Mmu_context::
Mmu_context(addr_t table,
Board::Address_space_id_allocator &addr_space_id_alloc)
:
_addr_space_id_alloc(addr_space_id_alloc),
ttbr0(Ttbr_64bit::Ba::masked((Ttbr_64bit::access_t)table))
{
Ttbr_64bit::Asid::set(ttbr0, (Genode::uint8_t)alloc().alloc());
Ttbr_64bit::Asid::set(ttbr0, (Genode::uint8_t)addr_space_id_alloc.alloc());
}
@ -36,7 +31,7 @@ Genode::Cpu::Mmu_context::~Mmu_context()
{
/* flush TLB by ASID */
Cpu::Tlbiasid::write(id());
alloc().free(id());
_addr_space_id_alloc.free(id());
}

21
repos/base-hw/src/core/spec/cortex_a15/cpu.h
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@ -85,14 +85,25 @@ class Genode::Cpu : public Arm_v7_cpu
/**
* An usermode execution state
*/
struct Mmu_context
class Mmu_context
{
Ttbr_64bit::access_t ttbr0;
private:
Mmu_context(addr_t const table);
~Mmu_context();
Board::Address_space_id_allocator &_addr_space_id_alloc;
Genode::uint8_t id() const { return Ttbr_64bit::Asid::get(ttbr0); }
public:
Ttbr_64bit::access_t ttbr0;
Mmu_context(addr_t table,
Board::Address_space_id_allocator &addr_space_id_alloc);
~Mmu_context();
Genode::uint8_t id() const
{
return Ttbr_64bit::Asid::get(ttbr0);
}
};
static void mmu_fault_status(Fsr::access_t fsr,

25
repos/base-hw/src/core/spec/riscv/address_space_id_allocator.h Normal file
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@ -0,0 +1,25 @@
/*
* \brief Allocator for hardware-specific address-space identifiers
* \author Martin Stein
* \date 2021-07-21
*/
/*
* Copyright (C) 2021 Genode Labs GmbH
*
* This file is part of the Genode OS framework, which is distributed
* under the terms of the GNU Affero General Public License version 3.
*/
#ifndef _RISCV__ADDRESS_SPACE_ID_ALLOCATOR_H_
#define _RISCV__ADDRESS_SPACE_ID_ALLOCATOR_H_
/* base includes */
#include <util/bit_allocator.h>
namespace Board {
class Address_space_id_allocator : public Genode::Bit_allocator<256> { };
}
#endif /* _RISCV__ADDRESS_SPACE_ID_ALLOCATOR_H_ */

20
repos/base-hw/src/core/spec/riscv/cpu.cc
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@ -12,15 +12,15 @@
* under the terms of the GNU Affero General Public License version 3.
*/
#include <base/internal/unmanaged_singleton.h>
/* base-hw internal includes */
#include <hw/assert.h>
/* base-hw Core includes */
#include <platform_pd.h>
#include <kernel/cpu.h>
#include <kernel/pd.h>
using Mmu_context = Genode::Cpu::Mmu_context;
using Asid_allocator = Genode::Bit_allocator<256>;
Genode::Cpu::Context::Context(bool)
@ -33,13 +33,13 @@ Genode::Cpu::Context::Context(bool)
}
static Asid_allocator & alloc() {
return *unmanaged_singleton<Asid_allocator>(); }
Mmu_context::Mmu_context(addr_t page_table_base)
Mmu_context::
Mmu_context(addr_t page_table_base,
Board::Address_space_id_allocator &addr_space_id_alloc)
:
_addr_space_id_alloc(addr_space_id_alloc)
{
Satp::Asid::set(satp, (Genode::uint8_t)alloc().alloc());
Satp::Asid::set(satp, (Genode::uint8_t)_addr_space_id_alloc.alloc());
Satp::Ppn::set(satp, page_table_base >> 12);
Satp::Mode::set(satp, 8);
}
@ -49,7 +49,7 @@ Mmu_context::~Mmu_context()
{
unsigned asid = Satp::Asid::get(satp);
Cpu::invalidate_tlb_by_pid(asid);
alloc().free(asid);
_addr_space_id_alloc.free(asid);
}

19
repos/base-hw/src/core/spec/riscv/cpu.h
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@ -27,6 +27,9 @@
namespace Kernel { struct Thread_fault; }
namespace Board { class Address_space_id_allocator; }
namespace Genode {
/**
@ -50,12 +53,20 @@ class Genode::Cpu : public Hw::Riscv_cpu
Context(bool);
};
struct Mmu_context
class Mmu_context
{
Satp::access_t satp = 0;
private:
Mmu_context(addr_t page_table_base);
~Mmu_context();
Board::Address_space_id_allocator &_addr_space_id_alloc;
public:
Satp::access_t satp = 0;
Mmu_context(addr_t page_table_base,
Board::Address_space_id_allocator &addr_space_id_alloc);
~Mmu_context();
};

25
repos/base-hw/src/core/spec/x86_64/address_space_id_allocator.h Normal file
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@ -0,0 +1,25 @@
/*
* \brief Allocator for hardware-specific address-space identifiers
* \author Martin Stein
* \date 2021-07-21
*/
/*
* Copyright (C) 2021 Genode Labs GmbH
*
* This file is part of the Genode OS framework, which is distributed
* under the terms of the GNU Affero General Public License version 3.
*/
#ifndef _X86_64__ADDRESS_SPACE_ID_ALLOCATOR_H_
#define _X86_64__ADDRESS_SPACE_ID_ALLOCATOR_H_
/* base includes */
#include <util/bit_allocator.h>
namespace Board {
class Address_space_id_allocator { };
}
#endif /* _X86_64__ADDRESS_SPACE_ID_ALLOCATOR_H_ */

3
repos/base-hw/src/core/spec/x86_64/cpu.cc
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@ -43,7 +43,8 @@ Genode::Cpu::Context::Context(bool core)
}
Genode::Cpu::Mmu_context::Mmu_context(addr_t const table)
Genode::Cpu::Mmu_context::Mmu_context(addr_t table,
Board::Address_space_id_allocator &)
: cr3(Cr3::Pdb::masked(table)) { }

6
repos/base-hw/src/core/spec/x86_64/cpu.h
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@ -33,6 +33,9 @@
namespace Kernel { struct Thread_fault; }
namespace Board { class Address_space_id_allocator; }
namespace Genode {
class Cpu;
@ -107,7 +110,8 @@ class Genode::Cpu : public Hw::X86_64_cpu
{
addr_t cr3;
Mmu_context(addr_t page_table_base);
Mmu_context(addr_t page_table_base,
Board::Address_space_id_allocator &);
};
/**