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base: Add errcode to x86_64 Cpu_state

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The new errcode field is used to store the error code that some
interrupts provide (e.g. #PF). Rework mode transition reserved space and
offset constants to match the new CPU_state layout.
This commit is contained in:
Adrian-Ken Rueegsegger 2015-02-21 01:24:00 +01:00 committed by Christian Helmuth
parent 1d762ca254
commit 408cec32f5
2 changed files with 28 additions and 26 deletions
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13
repos/base-hw/src/core/spec/x86_64/mode_transition.s
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@ -21,11 +21,12 @@
.set BUFFER_SIZE, 6 * 8 .set BUFFER_SIZE, 6 * 8
/* offsets of the member variables in a CPU context */ /* offsets of the member variables in a CPU context */
.set SP_OFFSET, 1 * 8 .set SP_OFFSET, 1 * 8
.set R8_OFFSET, 2 * 8 .set R8_OFFSET, 2 * 8
.set RAX_OFFSET, 10 * 8 .set RAX_OFFSET, 10 * 8
.set FLAGS_OFFSET, 18 * 8 .set ERRCODE_OFFSET, 17 * 8
.set CR3_OFFSET, 20 * 8 .set FLAGS_OFFSET, 18 * 8
.set CR3_OFFSET, 21 * 8
.section .text .section .text
@ -48,7 +49,7 @@
_mt_master_context_begin: _mt_master_context_begin:
/* space must be at least as large as 'Cpu_state' */ /* space must be at least as large as 'Cpu_state' */
.space 21*8 .space 22*8
.global _mt_master_context_end .global _mt_master_context_end
_mt_master_context_end: _mt_master_context_end:

41
repos/base/include/x86_64/cpu/cpu_state.h
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@ -23,26 +23,27 @@ namespace Genode { struct Cpu_state; }
struct Genode::Cpu_state struct Genode::Cpu_state
{ {
addr_t ip = 0; addr_t ip = 0;
addr_t sp = 0; addr_t sp = 0;
addr_t r8 = 0; addr_t r8 = 0;
addr_t r9 = 0; addr_t r9 = 0;
addr_t r10 = 0; addr_t r10 = 0;
addr_t r11 = 0; addr_t r11 = 0;
addr_t r12 = 0; addr_t r12 = 0;
addr_t r13 = 0; addr_t r13 = 0;
addr_t r14 = 0; addr_t r14 = 0;
addr_t r15 = 0; addr_t r15 = 0;
addr_t rax = 0; addr_t rax = 0;
addr_t rbx = 0; addr_t rbx = 0;
addr_t rcx = 0; addr_t rcx = 0;
addr_t rdx = 0; addr_t rdx = 0;
addr_t rdi = 0; addr_t rdi = 0;
addr_t rsi = 0; addr_t rsi = 0;
addr_t rbp = 0; addr_t rbp = 0;
addr_t ss = 0; addr_t errcode = 0;
addr_t eflags = 0; addr_t eflags = 0;
addr_t trapno = 0; addr_t trapno = 0;
addr_t ss = 0;
}; };
#endif /* _INCLUDE__X86_64__CPU__CPU_STATE_H_ */ #endif /* _INCLUDE__X86_64__CPU__CPU_STATE_H_ */