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@ -369,7 +369,7 @@ class Ahci_device_base
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Generic_ctrl *_ctrl; /* generic host control */
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Generic_ctrl *_ctrl; /* generic host control */
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Ahci_port *_port; /* port base of device */
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Ahci_port *_port; /* port base of device */
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Irq_connection *_irq; /* device IRQ */
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Irq_session_client *_irq; /* device IRQ */
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Genode::Signal_receiver _irq_rec; /* IRQ signal receiver */
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Genode::Signal_receiver _irq_rec; /* IRQ signal receiver */
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Genode::Signal_context _irq_ctx; /* IRQ signal context */
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Genode::Signal_context _irq_ctx; /* IRQ signal context */
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size_t _block_cnt; /* number of blocks on device */
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size_t _block_cnt; /* number of blocks on device */
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@ -114,26 +114,6 @@ class Ahci_device : public Ahci_device_base
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_identify_device();
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_identify_device();
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}
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}
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static void _disable_msi(::Pci::Device_client *pci)
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{
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enum { PM_CAP_OFF = 0x34, MSI_CAP = 0x5, MSI_ENABLED = 0x1 };
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uint8_t cap = pci->config_read(PM_CAP_OFF, ::Pci::Device::ACCESS_8BIT);
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/* iterate through cap pointers */
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for (uint16_t val = 0; cap; cap = val >> 8) {
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val = pci->config_read(cap, ::Pci::Device::ACCESS_16BIT);
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if ((val & 0xff) != MSI_CAP)
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continue;
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uint16_t msi = pci->config_read(cap + 2, ::Pci::Device::ACCESS_16BIT);
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if (msi & MSI_ENABLED) {
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pci->config_write(cap + 2, msi ^ MSI_CAP, ::Pci::Device::ACCESS_8BIT);
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PINF("Disabled MSIs %x", msi);
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}
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}
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}
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public:
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public:
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Ahci_device(addr_t base, Io_mem_session_capability io_cap,
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Ahci_device(addr_t base, Io_mem_session_capability io_cap,
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@ -187,10 +167,7 @@ class Ahci_device : public Ahci_device_base
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PDBG("Bus address: %x:%02x.%u (0x%x)", bus, dev, func, (bus << 8) | ((dev & 0x1f) << 3) | (func & 0x7));
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PDBG("Bus address: %x:%02x.%u (0x%x)", bus, dev, func, (bus << 8) | ((dev & 0x1f) << 3) | (func & 0x7));
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}
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}
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/* disable message signaled interrupts */
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device->_irq = new(env()->heap()) Irq_session_client(pci_device->irq(0));
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_disable_msi(pci_device);
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device->_irq = new(env()->heap()) Irq_connection(intr & 0xff);
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Genode::Signal_context_capability cap = device->_irq_rec.manage(&device->_irq_ctx);
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Genode::Signal_context_capability cap = device->_irq_rec.manage(&device->_irq_ctx);
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device->_irq->sigh(cap);
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device->_irq->sigh(cap);
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device->_irq->ack_irq();
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device->_irq->ack_irq();
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