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TrustZone: reenable memory protection (fix #1060)
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14a636f9a7
commit
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@ -20,10 +20,16 @@
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namespace Trustzone
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{
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enum {
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VM_STATE_SIZE = 1 << 20,
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/**
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* Currently, we limit secure RAM to 256 MB only,
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* because the memory protection feature of the M4IF
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* on this platform allows to protect a max. region of
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* 256MB per RAM bank only.
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*/
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SECURE_RAM_BASE = Genode::Board_base::RAM0_BASE,
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SECURE_RAM_SIZE = Genode::Board_base::RAM0_SIZE - VM_STATE_SIZE,
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SECURE_RAM_SIZE = 256 * 1024 * 1024,
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VM_STATE_BASE = SECURE_RAM_BASE + SECURE_RAM_SIZE,
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VM_STATE_SIZE = 1 << 20,
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NONSECURE_RAM_BASE = Genode::Board_base::RAM1_BASE,
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NONSECURE_RAM_SIZE = Genode::Board_base::RAM1_SIZE,
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};
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@ -21,17 +21,32 @@ class M4if : Genode::Mmio
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{
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private:
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enum { SZ_256MB = 1024 * 1024 * 256 };
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struct Protection_boundary_crossed {};
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struct Wm_reg0_ddr0_start : public Register<0xec, 32>
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{
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struct Addr : Bitfield<0,20> {};
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struct Enable : Bitfield<31,1> {};
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};
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struct Wm_reg0_ddr1_start : public Register<0xf0, 32>
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{
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struct Addr : Bitfield<0,20> {};
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struct Enable : Bitfield<31,1> {};
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};
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struct Wm_reg0_ddr0_end : public Register<0x10c, 32>
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{
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struct Addr : Bitfield<0,20> {};
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};
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struct Wm_reg0_ddr1_end : public Register<0x110, 32>
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{
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struct Addr : Bitfield<0,20> {};
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};
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struct Wm_reg0_irq : public Register<0x114, 32>
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{
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struct Status_ddr0 : Bitfield<6,1> {};
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@ -40,12 +55,15 @@ class M4if : Genode::Mmio
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struct Wm_reg0_addr : public Register<0x118, 32> {};
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public:
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M4if(Genode::addr_t const base) : Genode::Mmio(base) {}
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void set_region(Genode::addr_t addr, Genode::size_t size)
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void set_region0(Genode::addr_t addr, Genode::size_t size)
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{
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if (size > SZ_256MB) throw Protection_boundary_crossed();
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write<Wm_reg0_ddr0_end::Addr>((addr+size-1) >> 12);
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write<Wm_reg0_ddr0_start>(
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Wm_reg0_ddr0_start::Addr::bits(addr >> 12) |
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@ -53,6 +71,17 @@ class M4if : Genode::Mmio
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write<Wm_reg0_irq::Enable>(1);
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}
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void set_region1(Genode::addr_t addr, Genode::size_t size)
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{
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if (size > SZ_256MB) throw Protection_boundary_crossed();
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write<Wm_reg0_ddr1_end::Addr>((addr+size-1) >> 12);
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write<Wm_reg0_ddr1_start>(
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Wm_reg0_ddr1_start::Addr::bits(addr >> 12) |
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Wm_reg0_ddr1_start::Enable::bits(1));
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write<Wm_reg0_irq::Enable>(1);
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}
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void ack_irq() { write<Wm_reg0_irq::Status_ddr0>(1); }
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Genode::addr_t violation_addr() { return read<Wm_reg0_addr>(); }
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@ -124,8 +124,8 @@ class Vmm::Vmm : public Thread<8192>
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_m4if_io_mem(Board_base::M4IF_BASE, Board_base::M4IF_SIZE),
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_m4if((addr_t)env()->rm_session()->attach(_m4if_io_mem.dataspace()))
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{
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_m4if.set_region(Trustzone::SECURE_RAM_BASE,
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Trustzone::SECURE_RAM_SIZE);
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_m4if.set_region0(Trustzone::SECURE_RAM_BASE,
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Trustzone::SECURE_RAM_SIZE);
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}
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};
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