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sel4: update to 3.2.0

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- disable iommu
- increase root_cnode further for native boot
- support vesa driver on native hardware
- don't mask edge triggered ioapic irqs
- increase various allocators to get noux_tool_chain_* booting natively

Issue #2044
This commit is contained in:
Alexander Boettcher 2016-07-21 14:40:16 +02:00 committed by Christian Helmuth
parent b2a8cfde85
commit 356e6498b6
14 changed files with 127 additions and 91 deletions
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1
repos/base-sel4/lib/mk/spec/x86_32/kernel.mk
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@ -17,7 +17,6 @@ build_kernel:
$(VERBOSE)$(MAKE) \
TOOLPREFIX=$(CROSS_DEV_PREFIX) \
ARCH=x86 SEL4_ARCH=ia32 PLAT=pc99 DEBUG=1 \
CONFIG_KERNEL_EXTRA_CPPFLAGS="-DCONFIG_PRINTING=y -DCONFIG_USER_STACK_TRACE_LENGTH=16" \
LDFLAGS+=-nostdlib LDFLAGS+=-Wl,-nostdlib \
$(addprefix LDFLAGS+=$(LINKER_OPT_PREFIX),$(LD_MARCH)) \
CFLAGS+="-fno-builtin-printf -O3" \

4
repos/base-sel4/lib/mk/spec/x86_32/platform.mk
View File

@ -93,13 +93,13 @@ $(BUILD_BASE_DIR)/include/sel4/sel4_arch/invocation.h: $(LIBSEL4_DIR)/sel4_arch_
$(MSG_CONVERT)$(notdir $@)
$(VERBOSE)mkdir -p $(dir $@)
$(VERBOSE)python $(LIBSEL4_DIR)/tools/invocation_header_gen.py \
--xml $< --libsel4 --dest $@
--xml $< --libsel4 --sel4_arch --dest $@
$(BUILD_BASE_DIR)/include/sel4/arch/invocation.h: $(LIBSEL4_DIR)/arch_include/x86/interfaces/sel4arch.xml
$(MSG_CONVERT)arch/$(notdir $@)
$(VERBOSE)mkdir -p $(dir $@)
$(VERBOSE)python $(LIBSEL4_DIR)/tools/invocation_header_gen.py \
--xml $< --libsel4 --sel4_arch --dest $@
--xml $< --libsel4 --arch --dest $@
SEL4_CLIENT_H_SRC := $(LIBSEL4_DIR)/sel4_arch_include/ia32/interfaces/sel4arch.xml \
$(LIBSEL4_DIR)/arch_include/x86/interfaces/sel4arch.xml \

31
repos/base-sel4/patches/bda.patch
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@ -1,31 +0,0 @@
--- src/kernel/sel4/src/arch/x86/kernel/cmdline.c
+++ src/kernel/sel4/src/arch/x86/kernel/cmdline.c
@@ -107,9 +107,16 @@ static void UNUSED parse_uint16_array(char* str, uint16_t* array, int array_size
void cmdline_parse(const char *cmdline, cmdline_opt_t* cmdline_opt)
{
+#if defined(CONFIG_PRINTING) || defined(CONFIG_DEBUG_BUILD)
+ /* use BIOS data area to read serial configuration */
+ const unsigned short * bda_port = (unsigned short *)0x400;
+ const unsigned short * bda_equi = (unsigned short *)0x410;
+ int const bda_ports_count = (*bda_equi >> 9) & 0x7;
+#endif
+
#ifdef CONFIG_PRINTING
- /* initialise to default */
- cmdline_opt->console_port = 0x3f8;
+ /* initialise to default or use BDA if available */
+ cmdline_opt->console_port = bda_ports_count && *bda_port ? *bda_port : 0x3f8;
if (parse_opt(cmdline, "console_port", cmdline_val, MAX_CMDLINE_VAL_LEN) != -1) {
parse_uint16_array(cmdline_val, &cmdline_opt->console_port, 1);
@@ -129,7 +136,8 @@ void cmdline_parse(const char *cmdline, cmdline_opt_t* cmdline_opt)
#endif
#ifdef CONFIG_DEBUG_BUILD
- cmdline_opt->debug_port = 0x3f8;
+ /* initialise to default or use BDA if available */
+ cmdline_opt->debug_port = bda_ports_count && *bda_port ? *bda_port : 0x3f8;
if (parse_opt(cmdline, "debug_port", cmdline_val, MAX_CMDLINE_VAL_LEN) != -1) {
parse_uint16_array(cmdline_val, &cmdline_opt->debug_port, 1);
}

133
repos/base-sel4/patches/dev_mem.patch
View File

@ -1,10 +1,71 @@
--- src/kernel/sel4/include/plat/pc99/plat/machine.h
+++ src/kernel/sel4/include/plat/pc99/plat/machine.h
@@ -51,8 +51,11 @@ typedef enum _irq_t {
#define BIOS_PADDR_END 0x100000
#define BIOS_PADDR_VIDEO_RAM_START 0x000A0000
+#define BIOS_PADDR_VIDEO_RAM_END 0x000B0000
/* The text mode framebuffer exists part way into the video ram region */
#define BIOS_PADDR_VIDEO_RAM_TEXT_MODE_START 0x000B8000
#define BIOS_PADDR_IVDEO_RAM_END 0x000C0000
+#define BIOS_PADDR_VIDEO_BIOS_START 0x000C0000
+#define BIOS_PADDR_VIDEO_BIOS_END 0x000CF000
#endif
--- src/kernel/sel4/src/arch/x86/kernel/boot_sys.c
+++ src/kernel/sel4/src/arch/x86/kernel/boot_sys.c
@@ -294,9 +294,11 @@ parse_mem_map(uint32_t mmap_length, uint32_t mmap_addr)
@@ -286,6 +286,40 @@ add_mem_p_regs(p_region_t reg)
}
/*
+ * Checks whether there are overlaps between the area _reg_ and _trim_area_.
+ * If there are overlaps, trim the _trim_area_ and if there is some rest left,
+ * store it in _tail_.
+ */
+static BOOT_CODE void
+trim_region(p_region_t *reg, p_region_t *trim_area, p_region_t *tail, bool_t add)
+{
+ bool_t const inside_start = trim_area->start <= reg->start && reg->start < trim_area->end;
+ bool_t const inside_end = trim_area->start < reg->end && reg->end <= trim_area->end;
+
+ if (reg->start >= reg->end)
+ return;
+
+ /* trim BIOS area if we detect overlaps */
+ if (!inside_start && !inside_end &&
+ (reg->start <= trim_area->start && trim_area->start < reg->end))
+ trim_area->start = trim_area->end;
+ else
+ if (inside_start && inside_end) {
+ tail->start = reg->end;
+ tail->end = trim_area->end;
+ trim_area->end = reg->start;
+ } else {
+ if (inside_start)
+ trim_area->end = reg->start;
+ if (inside_end)
+ trim_area->start = reg->end;
+ }
+
+ if (add)
+ insert_dev_p_reg(*reg);
+}
+
+/*
* the code relies that the GRUB provides correct information
* about the actual physical memory regions.
*/
@@ -295,9 +329,17 @@ parse_mem_map(uint32_t mmap_length, uint32_t mmap_addr)
multiboot_mmap_t *mmap = (multiboot_mmap_t *)((word_t)mmap_addr);
printf("Parsing GRUB physical memory map\n");
+ p_region_t bios_area = { .start = BIOS_PADDR_START, .end = BIOS_PADDR_END };
+ /*
+ * Legacy regions required by ACPI driver, VESA driver and graphic drivers
+ * (Intel)
+ */
+ p_region_t legacy_area = { .start = BIOS_PADDR_VIDEO_RAM_START, .end = BIOS_PADDR_END };
+ /* optimistic approach that the area splits at most only one time ;-( */
+ p_region_t legacy_split = { .start = 0, .end = 0 };
+
while ((word_t)mmap < (word_t)(mmap_addr + mmap_length)) {
- uint64_t mem_start = mmap->base_addr;
@ -14,35 +75,29 @@
uint32_t type = mmap->type;
if (mem_start != (uint64_t)(word_t)mem_start) {
printf("\tPhysical memory region not addressable\n");
@@ -307,9 +309,46 @@ parse_mem_map(uint32_t mmap_length, uint32_t mmap_addr)
@@ -308,9 +350,38 @@ parse_mem_map(uint32_t mmap_length, uint32_t mmap_addr)
mem_start, mem_start + mem_length
});
}
+ if (type == MULTIBOOT_MMAP_RESERVED_TYPE) {
+ if (type == MULTIBOOT_MMAP_RESERVED_TYPE ||
+ type == MULTIBOOT_MMAP_ACPI_TYPE ||
+ type == MULTIBOOT_MMAP_ACPI_NVS_TYPE) {
+
+ p_region_t reg = { .start = mem_start, .end = mem_start + mem_length};
+ p_region_t tail = { .start = 0, .end = 0 };
+
+ bool_t const inside_start = bios_area.start <= reg.start && reg.start < bios_area.end;
+ bool_t const inside_end = bios_area.start < reg.end && reg.end <= bios_area.end;
+
+ /* trim BIOS area if we detect overlaps */
+ if (!inside_start && !inside_end &&
+ (reg.start <= bios_area.start && bios_area.start < reg.end))
+ bios_area.start = bios_area.end;
+ else
+ if (inside_start && inside_end) {
+ p_region_t tail = { .start = reg.end, .end = bios_area.end };
+ if (tail.start < tail.end)
+ insert_dev_p_reg(tail);
+
+ bios_area.end = reg.start;
+ } else {
+ if (inside_start)
+ bios_area.end = reg.start;
+ if (inside_end)
+ bios_area.start = reg.end;
+ trim_region(&reg, &legacy_area, &tail, true);
+ if (tail.start < tail.end) {
+ assert(!(legacy_split.start < legacy_split.end));
+ legacy_split = tail;
+ }
+
+ insert_dev_p_reg(reg);
+ tail.start = 0; tail.end = 0;
+ trim_region(&reg, &legacy_split, &tail, false);
+ if (tail.start < tail.end) {
+ assert(!(legacy_split.start < legacy_split.end));
+ legacy_split = tail;
+ }
+ }
}
mmap++;
@ -51,17 +106,15 @@
+ /* first physical page - required by acpi drivers and vesa drivers */
+ insert_dev_p_reg((p_region_t) { .start = 0, .end = 0x1000 });
+
+ /* bios data area - required by acpi drivers */
+ if (bios_area.start < bios_area.end)
+ insert_dev_p_reg(bios_area);
+
+ /* check this XXX - vesa driver requires the regions on Qemu XXX */
+ insert_dev_p_reg((p_region_t) { .start = BIOS_PADDR_IVDEO_RAM_END, .end = BIOS_PADDR_START });
+ insert_dev_p_reg((p_region_t) { .start = BIOS_PADDR_VIDEO_RAM_START, .end = BIOS_PADDR_VIDEO_RAM_START + 0x8000 });
+ /* legacy area - required by acpi drivers */
+ if (legacy_area.start < legacy_area.end) {
+ insert_dev_p_reg(legacy_area);
+ insert_dev_p_reg(legacy_split);
+ }
}
static BOOT_CODE bool_t
@@ -348,6 +387,9 @@ try_boot_sys(
@@ -349,6 +420,9 @@ try_boot_sys(
/* copy CPU bootup code to lower memory */
memcpy((void*)BOOT_NODE_PADDR, boot_cpu_start, boot_cpu_end - boot_cpu_start);
@ -71,7 +124,7 @@
boot_state.mem_p_regs.count = 0;
if (mbi->flags & MULTIBOOT_INFO_MMAP_FLAG) {
parse_mem_map(mbi->mmap_length, mbi->mmap_addr);
@@ -377,9 +419,6 @@ try_boot_sys(
@@ -378,9 +452,6 @@ try_boot_sys(
pic_disable();
}
@ -81,3 +134,17 @@
/* get ACPI root table */
acpi_rsdt = acpi_init();
if (!acpi_rsdt) {
--- src/kernel/sel4/src/plat/pc99/machine/hardware.c
+++ src/kernel/sel4/src/plat/pc99/machine/hardware.c
@@ -26,11 +26,6 @@ void platAddDevices(void)
/* discover PCI devices and their regions */
/* pci_scan() calls insert_dev_p_reg() for each device region */
pci_scan();
- /* Add the text mode (EGA) frame buffer. 1 frame is enough for the
- * standard 80x25 text mode. This whole thing is a bit of a hack */
- insert_dev_p_reg( (p_region_t) {
- BIOS_PADDR_VIDEO_RAM_TEXT_MODE_START, BIOS_PADDR_VIDEO_RAM_TEXT_MODE_START + 0x1000
- } );
}
/* ============================== interrupts/IRQs ============================== */

12
repos/base-sel4/patches/ioapic.patch Normal file
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@ -0,0 +1,12 @@
--- src/kernel/sel4/src/plat/pc99/machine/ioapic.c
+++ src/kernel/sel4/src/plat/pc99/machine/ioapic.c
@@ -127,6 +127,9 @@ void ioapic_mask(bool_t mask, uint32_t ioapic, uint32_t pin)
return;
}
if (mask) {
+ /* only mask level triggered interrupts */
+ if (!(ioredtbl_state[index] & IOREDTBL_LOW_TRIGGER_MODE_LEVEL))
+ return;
ioredtbl_state[index] |= IOREDTBL_LOW_INTERRUPT_MASK;
} else {
ioredtbl_state[index] &= ~IOREDTBL_LOW_INTERRUPT_MASK;

11
repos/base-sel4/patches/python.patch
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@ -1,11 +0,0 @@
--- src/kernel/sel4/libsel4/tools/syscall_stub_gen.py
+++ src/kernel/sel4/libsel4/tools/syscall_stub_gen.py
@@ -807,7 +807,7 @@ def main():
print "Invalid word size in configuration file."
sys.exit(2)
else:
- wordsize = args.wsize
+ wordsize = int(args.wsize)
if wordsize is -1:
print "Invalid word size."

2
repos/base-sel4/patches/root_cnode.patch
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@ -5,7 +5,7 @@
#define CONFIG_LIB_CPIO 1
#define CONFIG_RETYPE_FAN_OUT_LIMIT 256
-#define CONFIG_ROOT_CNODE_SIZE_BITS 12
+#define CONFIG_ROOT_CNODE_SIZE_BITS 15
+#define CONFIG_ROOT_CNODE_SIZE_BITS 18
#define CONFIG_NUM_PRIORITIES 256
#define CONFIG_TESTPRINTER_REGEX ".*"
#define CONFIG_APP_SEL4TEST 1

2
repos/base-sel4/ports/sel4.hash
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@ -1 +1 @@
fa69a91f3d2a79383ec72c8a52ac78ddc68becd5
43b9bb3461e069f745494b9198d032e01fcca2f5

4
repos/base-sel4/ports/sel4.port
View File

@ -3,8 +3,8 @@ VERSION := git
DOWNLOADS := sel4.git
URL(sel4) := https://github.com/seL4/seL4.git
# master branch, version 3.1
REV(sel4) := 8150e914c377bb2d94796c6857d08f64973a7295
# master branch, version 3.2
REV(sel4) := e70cd7613bb3aed71d3df58c72146cc44a60190e
DIR(sel4) := src/kernel/sel4
PATCHES := $(wildcard $(REP_DIR)/patches/*.patch)

2
repos/base-sel4/src/core/include/core_cspace.h
View File

@ -27,7 +27,7 @@ class Genode::Core_cspace
enum {
NUM_TOP_SEL_LOG2 = 12UL,
/* CONFIG_ROOT_CNODE_SIZE_BITS from seL4 autoconf.h */
NUM_CORE_SEL_LOG2 = CONFIG_ROOT_CNODE_SIZE_BITS + 1,
NUM_CORE_SEL_LOG2 = CONFIG_ROOT_CNODE_SIZE_BITS,
NUM_PHYS_SEL_LOG2 = 20UL,
NUM_CORE_PAD_SEL_LOG2 = 32UL - NUM_TOP_SEL_LOG2 - NUM_CORE_SEL_LOG2,

2
repos/base-sel4/src/core/include/page_table_registry.h
View File

@ -181,7 +181,7 @@ class Genode::Page_table_registry
};
Static_allocator<Page_table, 128> _page_table_alloc;
Static_allocator<Page_table::Entry, 2048> _page_table_entry_alloc;
Static_allocator<Page_table::Entry, 3 * 1024> _page_table_entry_alloc;
List<Page_table> _page_tables;

8
repos/base-sel4/src/include/base/internal/capability_space_sel4.h
View File

@ -102,7 +102,7 @@ namespace Genode
};
enum {
CSPACE_SIZE_LOG2_1ST = 4,
CSPACE_SIZE_LOG2_1ST = 6,
CSPACE_SIZE_LOG2_2ND = 8,
CSPACE_SIZE_LOG2 = CSPACE_SIZE_LOG2_1ST + CSPACE_SIZE_LOG2_2ND,
NUM_CORE_MANAGED_SEL_LOG2 = 8,
@ -211,12 +211,12 @@ class Genode::Capability_space_sel4
template <typename... ARGS>
Native_capability::Data &create_capability(Cap_sel cap_sel, ARGS... args)
{
Lock::Guard guard(_lock);
addr_t const sel = cap_sel.value();
ASSERT(!_caps_data[sel].rpc_obj_key().valid());
ASSERT(sel < NUM_CAPS);
ASSERT(!_caps_data[sel].rpc_obj_key().valid());
Lock::Guard guard(_lock);
_caps_data[sel] = Tree_managed_data(args...);

2
repos/base-sel4/src/lib/base/capability_space.cc
View File

@ -40,7 +40,7 @@ namespace {
struct Local_capability_space
:
Capability_space_sel4<4*1024, 1UL << NUM_CORE_MANAGED_SEL_LOG2,
Capability_space_sel4<15*1024, 1UL << NUM_CORE_MANAGED_SEL_LOG2,
Native_capability::Data>
{ };

4
tool/run/boot_dir/sel4
View File

@ -174,7 +174,7 @@ proc run_boot_dir {binaries} {
puts $fh "default 0"
puts $fh "\ntitle Genode on seL4"
puts $fh " kernel /boot/bender norelocate"
puts $fh " module /sel4"
puts $fh " module /sel4 disable_iommu"
puts $fh " module /image.elf"
close $fh
@ -193,7 +193,7 @@ proc run_boot_dir {binaries} {
#
set fh [open "[run_dir]/config-52-54-00-12-34-56" "WRONLY CREAT TRUNC"]
puts $fh " exec /boot/bender norelocate"
puts $fh " load /sel4"
puts $fh " load /sel4 disable_iommu"
puts $fh " load /image.elf"
close $fh