libdrm: short-cut tiling in iris back end

Apparently the iris driver does not make use of tiling by the kernel, so
we shortcut the 'SET_TILING' call to keep iris happy with this quickfix.

However, tiling information may get lost, if the iris driver ever calls
'MMAP_GTT' and no fence is configured for the buffer. A follow-up commit
should address this shortcoming in the future.

Issue #4284
This commit is contained in:
Josef Söntgen 2021-10-12 16:59:36 +02:00 committed by Christian Helmuth
parent 31567c8e46
commit 2e0d9c8521

View File

@ -620,36 +620,8 @@ class Drm_call
int _device_gem_set_tiling(void *arg)
{
auto const p = reinterpret_cast<drm_i915_gem_set_tiling*>(arg);
Gpu::Buffer_id const id { .value = p->handle };
uint32_t const mode = p->tiling_mode;
uint32_t const stride = p->stride;
uint32_t const swizzle = p->swizzle_mode;
if (verbose_ioctl) {
Genode::error(__func__, ": ",
"handle: ", id.value, " "
"mode: ", mode, " "
"stride: ", stride , " "
"swizzle: ", swizzle);
}
bool ok = false;
try {
_buffer_space.apply<Buffer>(id, [&] (Buffer &b) {
/* we need a valid GGTT mapping for fencing */
if (!b.map_cap.valid() && !_map_buffer(b))
return;
uint32_t const m = (stride << 16) | (mode == 1 ? 1 : 0);
ok = _gpu_session.set_tiling(b.id(), m);
});
} catch (Genode::Id_space<Buffer>::Unknown_id) {
Genode::error(__func__, ": invalid handle: ", id.value);
}
return ok ? 0 : -1;
(void)arg;
return 0;
}
int _device_gem_sw_finish(void *)