mirror of
https://github.com/genodelabs/genode.git
synced 2025-04-19 08:36:49 +00:00
hw: prepare memory area for cpu's correctly
To correctly deal with sparsely used cpu numbers on x86, add an array to the board data-structure that tracks the actual cpus detected. Later when memory is available, and the per-cpu kernel stacks and cpu-local memory gets initialized, use the array to reference the correct memory slots. Fix genodelabs/genode#5468
This commit is contained in:
Stefan Kalkowski
Norman Feske
parent
b147dad267
commit
1c2822fcc4
@ -16,6 +16,7 @@
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#include <base/allocator_avl.h>
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#include <base/internal/elf.h>
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#include <hw/memory_consts.h>
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#include <hw/boot_info.h>
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#include <util/reconstructible.h>
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@ -170,6 +170,176 @@ static void amd_enable_serializing_lfence()
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}
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static inline void memory_add_region(addr_t base, addr_t size,
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Hw::Memory_region_array &early,
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Hw::Memory_region_array &late)
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{
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using namespace Hw;
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static constexpr size_t initial_map_max = 1024 * 1024 * 1024;
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/*
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* Exclude first physical page, so that it will become part of the
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* MMIO allocator. The framebuffer requests this page as MMIO.
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*/
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if (base == 0 && size >= get_page_size()) {
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base = get_page_size();
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size -= get_page_size();
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}
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/* exclude AP boot code page from normal RAM allocator */
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if (base <= AP_BOOT_CODE_PAGE && AP_BOOT_CODE_PAGE < base + size) {
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if (AP_BOOT_CODE_PAGE - base)
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early.add(Memory_region { base, AP_BOOT_CODE_PAGE - base });
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size -= AP_BOOT_CODE_PAGE - base;
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size -= (get_page_size() > size) ? size : get_page_size();
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base = AP_BOOT_CODE_PAGE + get_page_size();
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}
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/* skip partial 4k pages (seen with Qemu with ahci model enabled) */
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if (!aligned(base, 12)) {
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auto new_base = align_addr(base, 12);
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size -= (new_base - base > size) ? size : new_base - base;
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base = new_base;
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}
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/* remove partial 4k pages */
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if (!aligned(size, 12))
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size -= size & 0xffful;
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if (!size)
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return;
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if (base >= initial_map_max) {
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late.add(Memory_region { base, size });
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return;
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}
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if (base + size <= initial_map_max) {
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early.add(Memory_region { base, size });
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return;
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}
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size_t low_size = initial_map_max - base;
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early.add(Memory_region { base, low_size });
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late.add(Memory_region { initial_map_max, size - low_size });
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}
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static inline void parse_multi_boot_1(::Board::Boot_info &info,
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Hw::Memory_region_array &early,
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Hw::Memory_region_array &late)
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{
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for (unsigned i = 0; true; i++) {
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using Mmap = Multiboot_info::Mmap;
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Mmap v(Multiboot_info(__initial_bx).phys_ram_mmap_base(i));
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if (!v.base()) break;
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Mmap::Addr::access_t base = v.read<Mmap::Addr>();
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Mmap::Length::access_t size = v.read<Mmap::Length>();
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memory_add_region(base, size, early, late);
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}
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/* search ACPI RSDP pointer at known places */
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/* BIOS range to scan for */
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enum { BIOS_BASE = 0xe0000, BIOS_SIZE = 0x20000 };
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info.acpi_rsdp = search_rsdp(BIOS_BASE, BIOS_SIZE);
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if (!info.acpi_rsdp.valid()) {
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/* page 0 is remapped to 2M - 4k - see crt_translation table */
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addr_t const bios_addr = 2 * 1024 * 1024 - 4096;
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/* search EBDA (BIOS addr + 0x40e) */
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addr_t ebda_phys = (*reinterpret_cast<uint16_t *>(bios_addr + 0x40e)) << 4;
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if (ebda_phys < 0x1000)
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ebda_phys = bios_addr;
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info.acpi_rsdp = search_rsdp(ebda_phys, 0x1000 /* EBDA size */);
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}
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}
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static inline void parse_multi_boot_2(::Board::Boot_info &info,
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Hw::Memory_region_array &early,
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Hw::Memory_region_array &late)
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{
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Multiboot2_info mbi2(__initial_bx);
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mbi2.for_each_tag([&] (Multiboot2_info::Memory const & m) {
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uint32_t const type = m.read<Multiboot2_info::Memory::Type>();
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if (type != Multiboot2_info::Memory::Type::MEMORY)
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return;
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uint64_t const base = m.read<Multiboot2_info::Memory::Addr>();
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uint64_t const size = m.read<Multiboot2_info::Memory::Size>();
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memory_add_region(base, size, early, late);
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},
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[&] (Hw::Acpi_rsdp const &rsdp_v1) {
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/* only use ACPI RSDP v1 if nothing available/valid by now */
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if (!info.acpi_rsdp.valid())
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info.acpi_rsdp = rsdp_v1;
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},
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[&] (Hw::Acpi_rsdp const &rsdp_v2) {
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/* prefer v2 ever, override stored previous rsdp v1 potentially */
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info.acpi_rsdp = rsdp_v2;
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},
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[&] (Hw::Framebuffer const &fb) {
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info.framebuffer = fb;
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},
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[&] (uint64_t const efi_sys_tab) {
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info.efi_system_table = efi_sys_tab;
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});
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}
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static inline void acpi_system_description_table(Hw::Acpi_rsdp & acpi_rsdp,
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auto const &per_table)
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{
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if (!acpi_rsdp.valid())
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return;
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uint64_t const table_addr = acpi_rsdp.xsdt ? acpi_rsdp.xsdt : acpi_rsdp.rsdt;
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if (!table_addr)
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return;
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auto lambda = [&] (auto paddr_table) {
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addr_t const table_virt_addr = paddr_table;
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per_table(*reinterpret_cast<Hw::Acpi_generic *>(table_virt_addr),
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paddr_table);
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};
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Hw::Acpi_generic &table = *reinterpret_cast<Hw::Acpi_generic*>(table_addr);
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if (!memcmp(table.signature, "RSDT", 4)) {
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Hw::for_each_rsdt_entry(table, lambda);
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} else if (!memcmp(table.signature, "XSDT", 4)) {
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Hw::for_each_xsdt_entry(table, lambda);
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}
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}
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static inline void for_each_cpu(Hw::Acpi_rsdp & acpi_rsdp,
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auto const &per_cpu_fn)
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{
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auto lambda = [&] (Hw::Acpi_generic &table, uint64_t) {
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Hw::for_each_apic_struct(table,[&](Hw::Apic_madt const *e) {
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if (e->type != Hw::Apic_madt::LAPIC)
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return;
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/* check if APIC is enabled in hardware */
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Hw::Apic_madt::Lapic lapic(e);
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if (lapic.valid()) per_cpu_fn(lapic.id());
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});
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};
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acpi_system_description_table(acpi_rsdp, lambda);
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}
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Bootstrap::Platform::Board::Board()
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:
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core_mmio(Memory_region { 0, 0x1000 },
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@ -179,179 +349,51 @@ Bootstrap::Platform::Board::Board()
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Memory_region { __initial_bx & ~0xFFFUL,
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get_page_size() })
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{
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Hw::Acpi_rsdp & acpi_rsdp = info.acpi_rsdp;
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static constexpr size_t initial_map_max = 1024 * 1024 * 1024;
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auto lambda = [&] (addr_t base, addr_t size) {
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/*
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* Exclude first physical page, so that it will become part of the
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* MMIO allocator. The framebuffer requests this page as MMIO.
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*/
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if (base == 0 && size >= get_page_size()) {
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base = get_page_size();
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size -= get_page_size();
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}
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/* exclude AP boot code page from normal RAM allocator */
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if (base <= AP_BOOT_CODE_PAGE && AP_BOOT_CODE_PAGE < base + size) {
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if (AP_BOOT_CODE_PAGE - base)
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early_ram_regions.add(Memory_region { base,
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AP_BOOT_CODE_PAGE - base });
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size -= AP_BOOT_CODE_PAGE - base;
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size -= (get_page_size() > size) ? size : get_page_size();
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base = AP_BOOT_CODE_PAGE + get_page_size();
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}
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/* skip partial 4k pages (seen with Qemu with ahci model enabled) */
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if (!aligned(base, 12)) {
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auto new_base = align_addr(base, 12);
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size -= (new_base - base > size) ? size : new_base - base;
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base = new_base;
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}
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/* remove partial 4k pages */
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if (!aligned(size, 12))
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size -= size & 0xffful;
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if (!size)
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return;
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if (base >= initial_map_max) {
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late_ram_regions.add(Memory_region { base, size });
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return;
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}
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if (base + size <= initial_map_max) {
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early_ram_regions.add(Memory_region { base, size });
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return;
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}
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size_t low_size = initial_map_max - base;
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early_ram_regions.add(Memory_region { base, low_size });
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late_ram_regions.add(Memory_region { initial_map_max, size - low_size });
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switch (__initial_ax) {
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case Multiboot_info::MAGIC:
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parse_multi_boot_1(info, early_ram_regions, late_ram_regions);
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break;
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case Multiboot2_info::MAGIC:
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parse_multi_boot_2(info, early_ram_regions, late_ram_regions);
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break;
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default:
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error("invalid multiboot magic value: ", Hex(__initial_ax));
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};
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if (__initial_ax == Multiboot2_info::MAGIC) {
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Multiboot2_info mbi2(__initial_bx);
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/* scan ACPI tables for FADT */
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auto lambda = [&] (Hw::Acpi_generic &table, uint64_t paddr) {
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mbi2.for_each_tag([&] (Multiboot2_info::Memory const & m) {
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uint32_t const type = m.read<Multiboot2_info::Memory::Type>();
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/* its signature is called FACP */
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if (memcmp(table.signature, "FACP", 4))
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return;
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if (type != Multiboot2_info::Memory::Type::MEMORY)
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return;
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info.acpi_fadt = addr_t(&table);
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uint64_t const base = m.read<Multiboot2_info::Memory::Addr>();
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uint64_t const size = m.read<Multiboot2_info::Memory::Size>();
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/* show firmware that we're an ACPI-aware OS */
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Hw::Acpi_fadt fadt(&table);
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fadt.takeover_acpi();
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lambda(base, size);
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},
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[&] (Hw::Acpi_rsdp const &rsdp_v1) {
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/* only use ACPI RSDP v1 if nothing available/valid by now */
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if (!acpi_rsdp.valid())
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acpi_rsdp = rsdp_v1;
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},
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[&] (Hw::Acpi_rsdp const &rsdp_v2) {
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/* prefer v2 ever, override stored previous rsdp v1 potentially */
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acpi_rsdp = rsdp_v2;
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},
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[&] (Hw::Framebuffer const &fb) {
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info.framebuffer = fb;
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},
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[&] (uint64_t const efi_sys_tab) {
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info.efi_system_table = efi_sys_tab;
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});
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} else if (__initial_ax == Multiboot_info::MAGIC) {
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for (unsigned i = 0; true; i++) {
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using Mmap = Multiboot_info::Mmap;
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Hw::Acpi_facs facs(fadt.facs());
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facs.wakeup_vector(AP_BOOT_CODE_PAGE);
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Mmap v(Multiboot_info(__initial_bx).phys_ram_mmap_base(i));
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if (!v.base()) break;
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auto mem_aligned = paddr & _align_mask(12);
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auto mem_size = align_addr(paddr + table.size, 12) - mem_aligned;
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core_mmio.add({ mem_aligned, mem_size });
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};
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acpi_system_description_table(info.acpi_rsdp, lambda);
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Mmap::Addr::access_t base = v.read<Mmap::Addr>();
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Mmap::Length::access_t size = v.read<Mmap::Length>();
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lambda(base, size);
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}
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/* search ACPI RSDP pointer at known places */
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/* BIOS range to scan for */
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enum { BIOS_BASE = 0xe0000, BIOS_SIZE = 0x20000 };
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acpi_rsdp = search_rsdp(BIOS_BASE, BIOS_SIZE);
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if (!acpi_rsdp.valid()) {
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/* page 0 is remapped to 2M - 4k - see crt_translation table */
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addr_t const bios_addr = 2 * 1024 * 1024 - 4096;
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/* search EBDA (BIOS addr + 0x40e) */
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addr_t ebda_phys = (*reinterpret_cast<uint16_t *>(bios_addr + 0x40e)) << 4;
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if (ebda_phys < 0x1000)
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ebda_phys = bios_addr;
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acpi_rsdp = search_rsdp(ebda_phys, 0x1000 /* EBDA size */);
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}
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} else {
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error("invalid multiboot magic value: ", Hex(__initial_ax));
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}
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/* remember max supported CPUs and use ACPI to get the actual number */
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unsigned const max_cpus =
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Hw::Mm::CPU_LOCAL_MEMORY_AREA_SIZE / Hw::Mm::CPU_LOCAL_MEMORY_SLOT_SIZE;
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/* get the actual number of cpus */
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static constexpr unsigned MAX_CPUS =
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Hw::Mm::CPU_LOCAL_MEMORY_AREA_SIZE /
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Hw::Mm::CPU_LOCAL_MEMORY_SLOT_SIZE;
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cpus = 0;
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for_each_cpu(info.acpi_rsdp, [this] (unsigned) { cpus++; });
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/* scan ACPI tables to find out number of CPUs in this machine */
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if (acpi_rsdp.valid()) {
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uint64_t const table_addr = acpi_rsdp.xsdt ? acpi_rsdp.xsdt : acpi_rsdp.rsdt;
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if (table_addr) {
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auto rsdt_xsdt_lambda = [&](auto paddr_table) {
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addr_t const table_virt_addr = paddr_table;
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Hw::Acpi_generic * table = reinterpret_cast<Hw::Acpi_generic *>(table_virt_addr);
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if (!memcmp(table->signature, "FACP", 4)) {
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info.acpi_fadt = addr_t(table);
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Hw::Acpi_fadt fadt(table);
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fadt.takeover_acpi();
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Hw::Acpi_facs facs(fadt.facs());
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facs.wakeup_vector(AP_BOOT_CODE_PAGE);
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auto mem_aligned = paddr_table & _align_mask(12);
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auto mem_size = align_addr(paddr_table + table->size, 12) - mem_aligned;
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core_mmio.add({ mem_aligned, mem_size });
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}
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if (memcmp(table->signature, "APIC", 4))
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return;
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Hw::for_each_apic_struct(*table,[&](Hw::Apic_madt const *e){
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if (e->type == Hw::Apic_madt::LAPIC) {
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Hw::Apic_madt::Lapic lapic(e);
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/* check if APIC is enabled in hardware */
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if (lapic.valid())
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cpus ++;
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}
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});
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};
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auto table = reinterpret_cast<Hw::Acpi_generic *>(table_addr);
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if (!memcmp(table->signature, "RSDT", 4)) {
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Hw::for_each_rsdt_entry(*table, rsdt_xsdt_lambda);
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} else if (!memcmp(table->signature, "XSDT", 4)) {
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Hw::for_each_xsdt_entry(*table, rsdt_xsdt_lambda);
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}
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}
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}
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if (!cpus || cpus > max_cpus) {
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Genode::warning("CPU count is unsupported ", cpus, "/", max_cpus,
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acpi_rsdp.valid() ? " - invalid or missing RSDT/XSDT"
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: " - invalid RSDP");
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cpus = !cpus ? 1 : max_cpus;
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if (!cpus || cpus > MAX_CPUS) {
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Genode::warning("CPU count is unsupported ", cpus, "/", MAX_CPUS,
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info.acpi_rsdp.valid() ? " - invalid or missing RSDT/XSDT"
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: " - invalid RSDP");
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cpus = !cpus ? 1 : MAX_CPUS;
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}
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/*
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@ -473,9 +515,7 @@ Board::Serial::Serial(addr_t, size_t, unsigned baudrate)
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unsigned Bootstrap::Platform::_prepare_cpu_memory_area()
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{
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using namespace Genode;
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for (size_t id = 0; id < board.cpus; id++)
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_prepare_cpu_memory_area(id);
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for_each_cpu(board.info.acpi_rsdp, [this] (unsigned id) {
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_prepare_cpu_memory_area(id); });
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return board.cpus;
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}
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