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openssl: do not depend on ARM CPU probing
With this commit libcrypto does not use ARM NEON extension as long as SPECS includes "neon". arm_v7a does declare "neon" per default while arm_v8a does. Issue #3773
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@ -1,4 +1,4 @@
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SPECS += arm_v8 arm_64 64bit
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SPECS += arm_v8 arm_64 64bit neon
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REP_INC_DIR += include/spec/arm_v8
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REP_INC_DIR += include/spec/arm_64
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@ -6,7 +6,7 @@ CC_OPT += -DSHA1_ASM -DSHA256_ASM -DSHA512_ASM -DKECCAK1600_ASM -DAES_ASM
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CC_OPT += -DGHASH_ASM -DECP_NISTZ256_ASM -DPOLY1305_ASM
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SRC_C = \
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armcap.c \
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armcap_genode.c \
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bf/bf_enc.c \
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bn/bn_asm.c \
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camellia/cmll_cbc.c \
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@ -33,6 +33,12 @@ SRC_S = \
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vpath %.S $(call select_from_ports,openssl)/src/lib/openssl/crypto
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ifeq ($(filter-out $(SPECS),neon),)
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vpath armcap_genode.c $(REP_DIR)/src/lib/openssl/crypto/spec/neon
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else
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vpath armcap_genode.c $(REP_DIR)/src/lib/openssl/crypto/spec/arm
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endif
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include $(REP_DIR)/lib/mk/libcrypto.inc
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CC_CXX_WARN_STRICT =
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@ -6,7 +6,7 @@ CC_OPT += -DSHA512_ASM -DKECCAK1600_ASM -DVPAES_ASM -DECP_NISTZ256_ASM
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CC_OPT += -DPOLY1305_ASM
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SRC_C = \
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armcap.c \
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armcap_genode.c \
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aes/aes_core.c \
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bf/bf_enc.c \
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bn/bn_asm.c \
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@ -32,6 +32,12 @@ SRC_S = \
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vpath %.S $(call select_from_ports,openssl)/src/lib/openssl/crypto
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ifeq ($(filter-out $(SPECS),neon),)
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vpath armcap_genode.c $(REP_DIR)/src/lib/openssl/crypto/spec/neon
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else
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vpath armcap_genode.c $(REP_DIR)/src/lib/openssl/crypto/spec/arm
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endif
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include $(REP_DIR)/lib/mk/libcrypto.inc
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CC_CXX_WARN_STRICT =
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@ -1 +1 @@
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76f11202782ecc6ea2342346bd70fe45960c1d66
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69864664449bcdbee8dc08f4bbce08a66ca22e6f
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@ -32,19 +32,6 @@
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open OUT,"| \"$^X\" \"$xlate\" $flavour \"$output\"";
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*STDOUT=*OUT;
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--- a/src/lib/openssl/crypto/armcap.c
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+++ b/src/lib/openssl/crypto/armcap.c
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@@ -114,6 +114,10 @@
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return;
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}
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+ /* Genode: only NEON for now */
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+ //OPENSSL_armcap_P |= ARMV7_NEON;
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+ return;
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+
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# if defined(__APPLE__) && !defined(__aarch64__)
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/*
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* Capability probing by catching SIGILL appears to be problematic
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--- a/src/lib/openssl/crypto/bn/asm/rsaz-avx2.pl
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+++ b/src/lib/openssl/crypto/bn/asm/rsaz-avx2.pl
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@@ -54,6 +54,8 @@
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@ -0,0 +1,22 @@
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/*
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* \brief OpenSSL ARM CPU capabilities (no NEON)
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* \author Pirmin Duss
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* \date 2021-02-17
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*/
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/*
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* Copyright (C) 2021 Genode Labs GmbH
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*
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* This file is part of the Genode OS framework, which is distributed
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* under the terms of the GNU Affero General Public License version 3.
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*/
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#include <stdint.h>
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unsigned int OPENSSL_armcap_P = 0;
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void OPENSSL_cpuid_setup(void) { }
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uint32_t OPENSSL_rdtsc(void) { return 0; }
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@ -0,0 +1,23 @@
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/*
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* \brief OpenSSL ARM CPU capabilities (with NEON support)
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* \author Pirmin Duss
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* \date 2021-02-17
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*/
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/*
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* Copyright (C) 2021 Genode Labs GmbH
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*
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* This file is part of the Genode OS framework, which is distributed
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* under the terms of the GNU Affero General Public License version 3.
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*/
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#include <stdint.h>
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#include "arm_arch.h"
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unsigned int OPENSSL_armcap_P = ARMV7_NEON;
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void OPENSSL_cpuid_setup(void) { }
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uint32_t OPENSSL_rdtsc(void) { return 0; }
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