mirror of
https://github.com/genodelabs/genode.git
synced 2024-12-19 13:47:56 +00:00
parent
be7a119deb
commit
1730e10469
@ -20,19 +20,26 @@
|
|||||||
|
|
||||||
namespace Arm_v7
|
namespace Arm_v7
|
||||||
{
|
{
|
||||||
using namespace Genode;
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* ARMv7 first level translation table
|
* First level translation table
|
||||||
*/
|
*/
|
||||||
class Section_table : public Arm::Section_table
|
class Section_table;
|
||||||
|
}
|
||||||
|
|
||||||
|
class Arm_v7::Section_table : public Arm::Section_table
|
||||||
{
|
{
|
||||||
|
private:
|
||||||
|
|
||||||
|
typedef Arm::Section_table Base;
|
||||||
|
typedef Genode::addr_t addr_t;
|
||||||
|
typedef Genode::size_t size_t;
|
||||||
|
|
||||||
public:
|
public:
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* Link to second level translation-table
|
* Link to second level translation-table
|
||||||
*/
|
*/
|
||||||
struct Page_table_descriptor : Arm::Section_table::Page_table_descriptor
|
struct Page_table_descriptor : Base::Page_table_descriptor
|
||||||
{
|
{
|
||||||
struct Ns : Bitfield<3, 1> { }; /* non-secure bit */
|
struct Ns : Bitfield<3, 1> { }; /* non-secure bit */
|
||||||
|
|
||||||
@ -42,15 +49,15 @@ namespace Arm_v7
|
|||||||
static access_t create(Arm::Page_table * const pt,
|
static access_t create(Arm::Page_table * const pt,
|
||||||
Section_table * const st)
|
Section_table * const st)
|
||||||
{
|
{
|
||||||
return Arm::Section_table::Page_table_descriptor::create(pt) |
|
access_t const ns = Ns::bits(!st->secure());
|
||||||
Ns::bits(!st->secure());
|
return Base::Page_table_descriptor::create(pt) | ns;
|
||||||
}
|
}
|
||||||
};
|
};
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* Section translation descriptor
|
* Section translation descriptor
|
||||||
*/
|
*/
|
||||||
struct Section : Arm::Section_table::Section
|
struct Section : Base::Section
|
||||||
{
|
{
|
||||||
struct Ns : Bitfield<19, 1> { }; /* non-secure bit */
|
struct Ns : Bitfield<19, 1> { }; /* non-secure bit */
|
||||||
|
|
||||||
@ -58,18 +65,17 @@ namespace Arm_v7
|
|||||||
* Compose descriptor value
|
* Compose descriptor value
|
||||||
*/
|
*/
|
||||||
static access_t create(Page_flags const & flags,
|
static access_t create(Page_flags const & flags,
|
||||||
addr_t const pa,
|
addr_t const pa, Section_table * const st)
|
||||||
Section_table * const st)
|
|
||||||
{
|
{
|
||||||
return Arm::Section_table::Section::create(flags, pa) |
|
access_t const ns = Ns::bits(!st->secure());
|
||||||
Ns::bits(!st->secure());
|
return Base::Section::create(flags, pa) | ns;
|
||||||
}
|
}
|
||||||
};
|
};
|
||||||
|
|
||||||
protected:
|
protected:
|
||||||
|
|
||||||
/* if this table is dedicated to secure mode or to non-secure mode */
|
/* if this table is dedicated to secure mode or to non-secure mode */
|
||||||
bool _secure;
|
bool const _secure;
|
||||||
|
|
||||||
public:
|
public:
|
||||||
|
|
||||||
@ -81,16 +87,15 @@ namespace Arm_v7
|
|||||||
/**
|
/**
|
||||||
* Insert one atomic translation into this table
|
* Insert one atomic translation into this table
|
||||||
*
|
*
|
||||||
* For details see 'Arm::Section_table::insert_translation'
|
* For details see 'Base::insert_translation'
|
||||||
*/
|
*/
|
||||||
size_t
|
size_t insert_translation(addr_t const vo, addr_t const pa,
|
||||||
insert_translation(addr_t const vo, addr_t const pa,
|
|
||||||
size_t const size_log2,
|
size_t const size_log2,
|
||||||
Page_flags const & flags,
|
Page_flags const & flags,
|
||||||
void * const extra_space = 0) {
|
void * const p = 0)
|
||||||
return Arm::Section_table::
|
{
|
||||||
insert_translation<Section_table>(vo, pa, size_log2, flags,
|
return Base::insert_translation(vo, pa, size_log2, flags, this, p);
|
||||||
this, extra_space); }
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* Insert translations for given area, do not permit displacement
|
* Insert translations for given area, do not permit displacement
|
||||||
@ -99,17 +104,18 @@ namespace Arm_v7
|
|||||||
* \param s area size
|
* \param s area size
|
||||||
* \param io_mem wether the area maps MMIO
|
* \param io_mem wether the area maps MMIO
|
||||||
*/
|
*/
|
||||||
void map_core_area(addr_t vo, size_t s, bool const io_mem) {
|
void map_core_area(addr_t vo, size_t s, bool const io_mem)
|
||||||
Arm::Section_table::map_core_area<Section_table>(vo, s, io_mem,
|
{
|
||||||
this); }
|
Base::map_core_area(vo, s, io_mem, this);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
/***************
|
/***************
|
||||||
** Accessors **
|
** Accessors **
|
||||||
***************/
|
***************/
|
||||||
|
|
||||||
bool secure() { return _secure; }
|
bool secure() const { return _secure; }
|
||||||
};
|
};
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
template <typename T>
|
template <typename T>
|
||||||
@ -119,18 +125,10 @@ Arm::memory_region_attr(Page_flags const &flags)
|
|||||||
typedef typename T::Tex Tex;
|
typedef typename T::Tex Tex;
|
||||||
typedef typename T::C C;
|
typedef typename T::C C;
|
||||||
typedef typename T::B B;
|
typedef typename T::B B;
|
||||||
|
if (flags.device) { return Tex::bits(2); }
|
||||||
/*
|
if (flags.cacheable) { return Tex::bits(5) | B::bits(1); }
|
||||||
* FIXME: upgrade to write-back & write-allocate when !d & c
|
return Tex::bits(6) | C::bits(1);
|
||||||
*/
|
|
||||||
if(flags.device)
|
|
||||||
return Tex::bits(2) | C::bits(0) | B::bits(0);
|
|
||||||
|
|
||||||
if(flags.cacheable)
|
|
||||||
return Tex::bits(5) | C::bits(0) | B::bits(1);
|
|
||||||
|
|
||||||
return Tex::bits(6) | C::bits(1) | B::bits(0);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* _TLB__ARM_V7_H_ */
|
|
||||||
|
|
||||||
|
#endif /* _TLB__ARM_V7_H_ */
|
||||||
|
Loading…
Reference in New Issue
Block a user