mirror of
https://github.com/genodelabs/genode.git
synced 2024-12-19 21:57:55 +00:00
gpu/intel: free DMA, clear ggtt
* free DMA caps in case platform client's session is closed * clear GGTT of platform client upon session close issue #4233
This commit is contained in:
parent
6c003a13d2
commit
1727de30b7
@ -85,23 +85,8 @@ struct Igd::Device
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Env &_env;
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Env &_env;
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Allocator &_md_alloc;
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Allocator &_md_alloc;
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/***********
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** Timer **
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***********/
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Timer::Connection _timer { _env };
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enum { WATCHDOG_TIMEOUT = 1*1000*1000, };
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enum { WATCHDOG_TIMEOUT = 1*1000*1000, };
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struct Timer_delayer : Genode::Mmio::Delayer
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{
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Timer::Connection &_timer;
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Timer_delayer(Timer::Connection &timer) : _timer(timer) { }
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void usleep(uint64_t us) override { _timer.usleep(us); }
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} _delayer { _timer };
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/*********
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/*********
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** PCI **
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** PCI **
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*********/
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*********/
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@ -193,7 +178,7 @@ struct Igd::Device
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** MMIO **
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** MMIO **
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**********/
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**********/
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Genode::Constructible<Igd::Mmio> _mmio { };
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Igd::Mmio &_mmio { _resources.mmio() };
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/************
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/************
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** MEMORY **
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** MEMORY **
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@ -732,7 +717,7 @@ struct Igd::Device
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{
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{
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Execlist &el = *engine.execlist;
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Execlist &el = *engine.execlist;
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int const port = _mmio->read<Igd::Mmio::EXECLIST_STATUS_RSCUNIT::Execlist_write_pointer>();
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int const port = _mmio.read<Igd::Mmio::EXECLIST_STATUS_RSCUNIT::Execlist_write_pointer>();
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el.schedule(port);
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el.schedule(port);
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@ -742,10 +727,10 @@ struct Igd::Device
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desc[1] = el.elem0().high();
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desc[1] = el.elem0().high();
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desc[0] = el.elem0().low();
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desc[0] = el.elem0().low();
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_mmio->write<Igd::Mmio::EXECLIST_SUBMITPORT_RSCUNIT>(desc[3]);
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_mmio.write<Igd::Mmio::EXECLIST_SUBMITPORT_RSCUNIT>(desc[3]);
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_mmio->write<Igd::Mmio::EXECLIST_SUBMITPORT_RSCUNIT>(desc[2]);
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_mmio.write<Igd::Mmio::EXECLIST_SUBMITPORT_RSCUNIT>(desc[2]);
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_mmio->write<Igd::Mmio::EXECLIST_SUBMITPORT_RSCUNIT>(desc[1]);
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_mmio.write<Igd::Mmio::EXECLIST_SUBMITPORT_RSCUNIT>(desc[1]);
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_mmio->write<Igd::Mmio::EXECLIST_SUBMITPORT_RSCUNIT>(desc[0]);
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_mmio.write<Igd::Mmio::EXECLIST_SUBMITPORT_RSCUNIT>(desc[0]);
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}
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}
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Vgpu *_unschedule_current_vgpu()
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Vgpu *_unschedule_current_vgpu()
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@ -774,19 +759,19 @@ struct Igd::Device
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Engine<Rcs_context> &rcs = gpu->rcs;
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Engine<Rcs_context> &rcs = gpu->rcs;
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_mmio->flush_gfx_tlb();
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_mmio.flush_gfx_tlb();
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/*
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/*
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* XXX check if HWSP is shared across contexts and if not when
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* XXX check if HWSP is shared across contexts and if not when
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* we actually need to write the register
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* we actually need to write the register
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*/
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*/
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Mmio::HWS_PGA_RCSUNIT::access_t const addr = rcs.hw_status_page();
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Mmio::HWS_PGA_RCSUNIT::access_t const addr = rcs.hw_status_page();
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_mmio->write_post<Igd::Mmio::HWS_PGA_RCSUNIT>(addr);
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_mmio.write_post<Igd::Mmio::HWS_PGA_RCSUNIT>(addr);
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_submit_execlist(rcs);
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_submit_execlist(rcs);
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_active_vgpu = gpu;
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_active_vgpu = gpu;
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_timer.trigger_once(WATCHDOG_TIMEOUT);
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_resources.timer().trigger_once(WATCHDOG_TIMEOUT);
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}
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}
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/**********
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/**********
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@ -795,7 +780,7 @@ struct Igd::Device
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void _clear_rcs_iir(Mmio::GT_0_INTERRUPT_IIR::access_t const v)
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void _clear_rcs_iir(Mmio::GT_0_INTERRUPT_IIR::access_t const v)
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{
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{
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_mmio->write_post<Mmio::GT_0_INTERRUPT_IIR>(v);
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_mmio.write_post<Mmio::GT_0_INTERRUPT_IIR>(v);
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}
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}
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/**
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/**
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@ -830,7 +815,7 @@ struct Igd::Device
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uint32_t _get_free_fence()
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uint32_t _get_free_fence()
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{
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{
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return _mmio->find_free_fence();
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return _mmio.find_free_fence();
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}
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}
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uint32_t _update_fence(uint32_t const id,
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uint32_t _update_fence(uint32_t const id,
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@ -839,12 +824,12 @@ struct Igd::Device
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uint32_t const pitch,
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uint32_t const pitch,
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bool const tile_x)
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bool const tile_x)
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{
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{
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return _mmio->update_fence(id, lower, upper, pitch, tile_x);
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return _mmio.update_fence(id, lower, upper, pitch, tile_x);
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}
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}
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void _clear_fence(uint32_t const id)
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void _clear_fence(uint32_t const id)
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{
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{
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_mmio->clear_fence(id);
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_mmio.clear_fence(id);
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}
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}
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/**********************
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/**********************
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@ -857,10 +842,10 @@ struct Igd::Device
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Genode::error("watchdog triggered: engine stuck,"
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Genode::error("watchdog triggered: engine stuck,"
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" vGPU=", _active_vgpu->id());
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" vGPU=", _active_vgpu->id());
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_mmio->dump();
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_mmio.dump();
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_mmio->error_dump();
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_mmio.error_dump();
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_mmio->fault_dump();
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_mmio.fault_dump();
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_mmio->execlist_status_dump();
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_mmio.execlist_status_dump();
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_active_vgpu->rcs.context->dump();
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_active_vgpu->rcs.context->dump();
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_active_vgpu->rcs.context->dump_hw_status_page();
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_active_vgpu->rcs.context->dump_hw_status_page();
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@ -883,11 +868,11 @@ struct Igd::Device
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void _device_reset_and_init()
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void _device_reset_and_init()
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{
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{
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_mmio->reset();
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_mmio.reset();
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_mmio->clear_errors();
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_mmio.clear_errors();
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_mmio->init();
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_mmio.init();
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_mmio->enable_intr();
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_mmio.enable_intr();
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_mmio->forcewake_enable();
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_mmio.forcewake_enable();
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}
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}
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/**
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/**
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@ -928,11 +913,9 @@ struct Igd::Device
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/* map PCI resources */
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/* map PCI resources */
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addr_t gttmmadr_base = _resources.map_gttmmadr();
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addr_t gttmmadr_base = _resources.map_gttmmadr();
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_mmio.construct(_delayer, gttmmadr_base);
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/* GGTT */
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/* GGTT */
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Ram_dataspace_capability scratch_page_ds = _pci_backend_alloc.alloc(PAGE_SIZE);
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addr_t const scratch_page = _resources.scratch_page();
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addr_t const scratch_page = Dataspace_client(scratch_page_ds).phys_addr();
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/* reserverd size for framebuffer */
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/* reserverd size for framebuffer */
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size_t const aperture_reserved = resources.gmadr_platform_size();
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size_t const aperture_reserved = resources.gmadr_platform_size();
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@ -940,18 +923,17 @@ struct Igd::Device
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size_t const ggtt_size = (1u << MGGC_0_2_0_PCI::Gtt_graphics_memory_size::get(v)) << 20;
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size_t const ggtt_size = (1u << MGGC_0_2_0_PCI::Gtt_graphics_memory_size::get(v)) << 20;
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addr_t const ggtt_base = gttmmadr_base + (_resources.gttmmadr_size() / 2);
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addr_t const ggtt_base = gttmmadr_base + (_resources.gttmmadr_size() / 2);
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size_t const gmadr_size = _resources.gmadr_size();
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size_t const gmadr_size = _resources.gmadr_size();
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_ggtt.construct(*_mmio, ggtt_base, ggtt_size, gmadr_size, scratch_page, aperture_reserved);
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_ggtt.construct(_mmio, ggtt_base, ggtt_size, gmadr_size, scratch_page, aperture_reserved);
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_ggtt->dump();
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_ggtt->dump();
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_vgpu_avail = (gmadr_size - aperture_reserved) / Vgpu::APERTURE_SIZE;
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_vgpu_avail = (gmadr_size - aperture_reserved) / Vgpu::APERTURE_SIZE;
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_device_reset_and_init();
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_device_reset_and_init();
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_mmio.dump();
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_mmio.context_status_pointer_dump();
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_mmio->dump();
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_resources.timer().sigh(_watchdog_timeout_sigh);
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_mmio->context_status_pointer_dump();
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_timer.sigh(_watchdog_timeout_sigh);
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}
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}
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/*********************
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/*********************
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@ -1105,7 +1087,7 @@ struct Igd::Device
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uint32_t set_tiling(Ggtt::Offset const start, size_t const size,
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uint32_t set_tiling(Ggtt::Offset const start, size_t const size,
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uint32_t const mode)
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uint32_t const mode)
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{
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{
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uint32_t const id = _mmio->find_free_fence();
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uint32_t const id = _mmio.find_free_fence();
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if (id == INVALID_FENCE) {
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if (id == INVALID_FENCE) {
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Genode::warning("could not find free FENCE");
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Genode::warning("could not find free FENCE");
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return id;
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return id;
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@ -1130,15 +1112,15 @@ struct Igd::Device
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unsigned handle_irq()
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unsigned handle_irq()
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{
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{
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Mmio::MASTER_INT_CTL::access_t master = _mmio->read<Mmio::MASTER_INT_CTL>();
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Mmio::MASTER_INT_CTL::access_t master = _mmio.read<Mmio::MASTER_INT_CTL>();
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/* handle render interrupts only */
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/* handle render interrupts only */
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if (Mmio::MASTER_INT_CTL::Render_interrupts_pending::get(master) == 0)
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if (Mmio::MASTER_INT_CTL::Render_interrupts_pending::get(master) == 0)
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return master;
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return master;
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_mmio->disable_master_irq();
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_mmio.disable_master_irq();
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Mmio::GT_0_INTERRUPT_IIR::access_t const v = _mmio->read<Mmio::GT_0_INTERRUPT_IIR>();
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Mmio::GT_0_INTERRUPT_IIR::access_t const v = _mmio.read<Mmio::GT_0_INTERRUPT_IIR>();
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bool const ctx_switch = Mmio::GT_0_INTERRUPT_IIR::Cs_ctx_switch_interrupt::get(v);
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bool const ctx_switch = Mmio::GT_0_INTERRUPT_IIR::Cs_ctx_switch_interrupt::get(v);
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(void)ctx_switch;
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(void)ctx_switch;
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@ -1153,10 +1135,10 @@ struct Igd::Device
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notify_gpu->user_complete();
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notify_gpu->user_complete();
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}
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}
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bool const fault_valid = _mmio->fault_regs_valid();
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bool const fault_valid = _mmio.fault_regs_valid();
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if (fault_valid) { Genode::error("FAULT_REG valid"); }
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if (fault_valid) { Genode::error("FAULT_REG valid"); }
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_mmio->update_context_status_pointer();
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_mmio.update_context_status_pointer();
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if (user_complete) {
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if (user_complete) {
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_unschedule_current_vgpu();
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_unschedule_current_vgpu();
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@ -1176,7 +1158,7 @@ struct Igd::Device
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return master;
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return master;
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}
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}
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void enable_master_irq() { _mmio->enable_master_irq(); }
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void enable_master_irq() { _mmio.enable_master_irq(); }
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private:
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private:
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@ -1623,9 +1605,10 @@ struct Main
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Genode::Sliced_heap _root_heap { _env.ram(), _env.rm() };
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Genode::Sliced_heap _root_heap { _env.ram(), _env.rm() };
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Gpu::Root _gpu_root { _env, _root_heap };
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Gpu::Root _gpu_root { _env, _root_heap };
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Genode::Heap _device_md_alloc;
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Genode::Heap _device_md_alloc { _env.ram(), _env.rm() };
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Genode::Constructible<Igd::Device> _device { };
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Genode::Constructible<Igd::Device> _device { };
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Igd::Resources _gpu_resources { _env, *this, &Main::ack_irq };
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Igd::Resources _gpu_resources { _env, _device_md_alloc,
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*this, &Main::ack_irq };
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Genode::Irq_session_client _irq { _gpu_resources.gpu_client().irq(0) };
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Genode::Irq_session_client _irq { _gpu_resources.gpu_client().irq(0) };
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Genode::Signal_handler<Main> _irq_dispatcher {
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Genode::Signal_handler<Main> _irq_dispatcher {
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@ -1635,24 +1618,21 @@ struct Main
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Main(Genode::Env &env)
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Main(Genode::Env &env)
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:
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:
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_env(env), _device_md_alloc(_env.ram(), _env.rm())
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_env(env)
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{
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{
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/* IRQ */
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/* IRQ */
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_irq.sigh(_irq_dispatcher);
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_irq.sigh(_irq_dispatcher);
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_irq.ack_irq();
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_irq.ack_irq();
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/* platform service */
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_platform_root.construct(_env, _device_md_alloc, _gpu_resources);
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/* GPU */
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/* GPU */
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try {
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try {
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_device.construct(_env, _device_md_alloc, _gpu_resources);
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_device.construct(_env, _device_md_alloc, _gpu_resources);
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} catch (...) {
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_gpu_root.manage(*_device);
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return;
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_env.parent().announce(_env.ep().manage(_gpu_root));
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}
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} catch (...) { }
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_gpu_root.manage(*_device);
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/* platform service */
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_env.parent().announce(_env.ep().manage(_gpu_root));
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_platform_root.construct(_env, _device_md_alloc, _gpu_resources);
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}
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}
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void handle_irq()
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void handle_irq()
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@ -1,7 +1,6 @@
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/*
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/*
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* \brief Platform service implementation
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* \brief Platform service implementation
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* \author Sebastian Sumpf
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* \author Sebastian Sumpf
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* \author Josef Soentgen
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* \date 2021-07-16
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* \date 2021-07-16
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*/
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*/
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@ -196,6 +195,23 @@ class Platform::Session_component : public Rpc_object<Session>
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Device_component _device_component;
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Device_component _device_component;
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Connection &_platform;
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Connection &_platform;
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Device_capability _bridge;
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Device_capability _bridge;
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Igd::Resources &_resources;
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struct Dma_cap
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{
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Ram_dataspace_capability cap;
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Dma_cap(Ram_dataspace_capability cap)
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: cap(cap) { }
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virtual ~Dma_cap() { }
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};
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/*
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* track DMA memory allocations so we can free them at session
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* destruction
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*/
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Registry<Registered<Dma_cap>> _dma_registry { };
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public:
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public:
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@ -204,7 +220,8 @@ class Platform::Session_component : public Rpc_object<Session>
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_env(env),
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_env(env),
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_device_component(env, resources),
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_device_component(env, resources),
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_platform(resources.platform()),
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_platform(resources.platform()),
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_bridge(resources.host_bridge_cap())
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_bridge(resources.host_bridge_cap()),
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_resources(resources)
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{
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{
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_env.ep().rpc_ep().manage(&_device_component);
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_env.ep().rpc_ep().manage(&_device_component);
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}
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}
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@ -212,13 +229,21 @@ class Platform::Session_component : public Rpc_object<Session>
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~Session_component()
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~Session_component()
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{
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{
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_env.ep().rpc_ep().dissolve(&_device_component);
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_env.ep().rpc_ep().dissolve(&_device_component);
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/* clear ggtt */
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_resources.gtt_platform_reset();
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/* free DMA allocations */
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_dma_registry.for_each([&](Dma_cap &dma) {
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_platform.free_dma_buffer(dma.cap);
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destroy(&_resources.heap(), &dma);
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});
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}
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}
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|
|
||||||
Device_capability first_device(unsigned device_class, unsigned class_mask) override
|
Device_capability first_device(unsigned device_class, unsigned) override
|
||||||
{
|
{
|
||||||
enum { ISA_BRIDGE = 0x601u << 8 };
|
if (device_class == _resources.isa_bridge_class())
|
||||||
if (device_class == ISA_BRIDGE)
|
return _resources.isa_bridge_cap();
|
||||||
return _platform.first_device(device_class, class_mask);
|
|
||||||
|
|
||||||
return _bridge;
|
return _bridge;
|
||||||
}
|
}
|
||||||
@ -232,14 +257,9 @@ class Platform::Session_component : public Rpc_object<Session>
|
|||||||
return Device_capability();
|
return Device_capability();
|
||||||
}
|
}
|
||||||
|
|
||||||
void release_device(Device_capability device) override
|
void release_device(Device_capability) override
|
||||||
{
|
{
|
||||||
if (device.valid() == false) return;
|
return;
|
||||||
|
|
||||||
if (_device_component.cap() == device || device == _bridge) {
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
_platform.release_device(device);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
Device_capability device(Device_name const & /* string */) override
|
Device_capability device(Device_name const & /* string */) override
|
||||||
@ -250,12 +270,20 @@ class Platform::Session_component : public Rpc_object<Session>
|
|||||||
|
|
||||||
Ram_dataspace_capability alloc_dma_buffer(size_t size, Cache cache) override
|
Ram_dataspace_capability alloc_dma_buffer(size_t size, Cache cache) override
|
||||||
{
|
{
|
||||||
return _platform.alloc_dma_buffer(size, cache);
|
Ram_dataspace_capability cap = _platform.alloc_dma_buffer(size, cache);
|
||||||
|
new (&_resources.heap()) Registered<Dma_cap>(_dma_registry, cap);
|
||||||
|
return cap;
|
||||||
}
|
}
|
||||||
|
|
||||||
void free_dma_buffer(Ram_dataspace_capability cap) override
|
void free_dma_buffer(Ram_dataspace_capability cap) override
|
||||||
{
|
{
|
||||||
_platform.free_dma_buffer(cap);
|
if (!cap.valid()) return;
|
||||||
|
|
||||||
|
_dma_registry.for_each([&](Dma_cap &dma) {
|
||||||
|
if ((dma.cap == cap) == false) return;
|
||||||
|
_platform.free_dma_buffer(cap);
|
||||||
|
destroy(&_resources.heap(), &dma);
|
||||||
|
});
|
||||||
}
|
}
|
||||||
|
|
||||||
addr_t dma_addr(Ram_dataspace_capability cap) override
|
addr_t dma_addr(Ram_dataspace_capability cap) override
|
||||||
|
@ -31,8 +31,22 @@ class Igd::Resources : Genode::Noncopyable
|
|||||||
|
|
||||||
using Io_mem_connection = Genode::Io_mem_connection;
|
using Io_mem_connection = Genode::Io_mem_connection;
|
||||||
using Io_mem_dataspace_capability = Genode::Io_mem_dataspace_capability;
|
using Io_mem_dataspace_capability = Genode::Io_mem_dataspace_capability;
|
||||||
|
using Ram_dataspace_capability = Genode::Ram_dataspace_capability;
|
||||||
|
|
||||||
Genode::Env &_env;
|
Genode::Env &_env;
|
||||||
|
Genode::Heap &_heap;
|
||||||
|
|
||||||
|
/* timer */
|
||||||
|
Timer::Connection _timer { _env };
|
||||||
|
|
||||||
|
struct Timer_delayer : Genode::Mmio::Delayer
|
||||||
|
{
|
||||||
|
Timer::Connection &_timer;
|
||||||
|
Timer_delayer(Timer::Connection &timer) : _timer(timer) { }
|
||||||
|
|
||||||
|
void usleep(uint64_t us) override { _timer.usleep(us); }
|
||||||
|
|
||||||
|
} _delayer { _timer };
|
||||||
|
|
||||||
/* irq callback */
|
/* irq callback */
|
||||||
Main &_obj;
|
Main &_obj;
|
||||||
@ -43,15 +57,26 @@ class Igd::Resources : Genode::Noncopyable
|
|||||||
|
|
||||||
Platform::Device_capability _gpu_cap { };
|
Platform::Device_capability _gpu_cap { };
|
||||||
Platform::Device_capability _host_bridge_cap { };
|
Platform::Device_capability _host_bridge_cap { };
|
||||||
|
Platform::Device_capability _isa_bridge_cap { };
|
||||||
Genode::Constructible<Platform::Device_client> _gpu_client { };
|
Genode::Constructible<Platform::Device_client> _gpu_client { };
|
||||||
|
|
||||||
/* mmio + gtt */
|
/* mmio + ggtt */
|
||||||
Platform::Device::Resource _gttmmadr { };
|
Platform::Device::Resource _gttmmadr { };
|
||||||
Io_mem_dataspace_capability _gttmmadr_ds { };
|
Io_mem_dataspace_capability _gttmmadr_ds { };
|
||||||
Genode::Constructible<Io_mem_connection> _gttmmadr_io { };
|
Genode::Constructible<Io_mem_connection> _gttmmadr_io { };
|
||||||
|
addr_t _gttmmadr_local { 0 };
|
||||||
|
|
||||||
|
Genode::Constructible<Igd::Mmio> _mmio { };
|
||||||
|
|
||||||
|
/* scratch page for ggtt */
|
||||||
|
Ram_dataspace_capability _scratch_page_ds {
|
||||||
|
_platform.with_upgrade([&] () {
|
||||||
|
return _platform.alloc_dma_buffer(PAGE_SIZE, Genode::UNCACHED); }) };
|
||||||
|
|
||||||
|
addr_t _scratch_page {
|
||||||
|
Genode::Dataspace_client(_scratch_page_ds).phys_addr() };
|
||||||
|
|
||||||
/* aperture */
|
/* aperture */
|
||||||
Platform::Device::Resource _gmadr { };
|
|
||||||
enum {
|
enum {
|
||||||
/* reserved aperture for platform service */
|
/* reserved aperture for platform service */
|
||||||
APERTURE_RESERVED = 64u<<20,
|
APERTURE_RESERVED = 64u<<20,
|
||||||
@ -59,14 +84,12 @@ class Igd::Resources : Genode::Noncopyable
|
|||||||
GTT_RESERVED = (APERTURE_RESERVED/PAGE_SIZE) * 8,
|
GTT_RESERVED = (APERTURE_RESERVED/PAGE_SIZE) * 8,
|
||||||
};
|
};
|
||||||
|
|
||||||
|
Platform::Device::Resource _gmadr { };
|
||||||
|
|
||||||
/* managed dataspace for local platform service */
|
/* managed dataspace for local platform service */
|
||||||
Genode::Rm_connection _rm_connection { _env };
|
Genode::Rm_connection _rm_connection { _env };
|
||||||
Genode::Constructible<Genode::Region_map_client> _gttmmadr_rm { };
|
Genode::Constructible<Genode::Region_map_client> _gttmmadr_rm { };
|
||||||
|
|
||||||
/**********
|
|
||||||
** Mmio **
|
|
||||||
**********/
|
|
||||||
|
|
||||||
void _create_gttmmadr_rm()
|
void _create_gttmmadr_rm()
|
||||||
{
|
{
|
||||||
using off_t = Genode::off_t;
|
using off_t = Genode::off_t;
|
||||||
@ -135,6 +158,12 @@ class Igd::Resources : Genode::Noncopyable
|
|||||||
continue;
|
continue;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
if (device.class_code() == isa_bridge_class()) {
|
||||||
|
_isa_bridge_cap = cap;
|
||||||
|
release = false;
|
||||||
|
continue;
|
||||||
|
}
|
||||||
|
|
||||||
release = true;
|
release = true;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@ -185,9 +214,10 @@ class Igd::Resources : Genode::Noncopyable
|
|||||||
|
|
||||||
public:
|
public:
|
||||||
|
|
||||||
Resources(Genode::Env &env, Main &obj, void (Main::*ack_irq) ())
|
Resources(Genode::Env &env, Genode::Heap &heap,
|
||||||
|
Main &obj, void (Main::*ack_irq) ())
|
||||||
:
|
:
|
||||||
_env(env), _obj(obj), _ack_irq(ack_irq)
|
_env(env), _heap(heap), _obj(obj), _ack_irq(ack_irq)
|
||||||
{
|
{
|
||||||
/* initial donation for device pd */
|
/* initial donation for device pd */
|
||||||
_platform.upgrade_ram(1024*1024);
|
_platform.upgrade_ram(1024*1024);
|
||||||
@ -207,9 +237,9 @@ class Igd::Resources : Genode::Noncopyable
|
|||||||
|
|
||||||
_enable_pci_bus_master();
|
_enable_pci_bus_master();
|
||||||
|
|
||||||
Genode::log("Reserved beginning ",
|
log("Reserved beginning ",
|
||||||
Genode::Number_of_bytes(APERTURE_RESERVED),
|
Genode::Number_of_bytes(APERTURE_RESERVED),
|
||||||
" of aperture for platform service");
|
" of aperture for platform service");
|
||||||
}
|
}
|
||||||
|
|
||||||
~Resources()
|
~Resources()
|
||||||
@ -223,14 +253,16 @@ class Igd::Resources : Genode::Noncopyable
|
|||||||
if (!_gttmmadr_ds.valid())
|
if (!_gttmmadr_ds.valid())
|
||||||
throw Initialization_failed();
|
throw Initialization_failed();
|
||||||
|
|
||||||
addr_t addr = (addr_t)(_env.rm().attach(_gttmmadr_ds, _gttmmadr.size()));
|
if (_gttmmadr_local) return _gttmmadr_local;
|
||||||
|
|
||||||
|
_gttmmadr_local = (addr_t)(_env.rm().attach(_gttmmadr_ds, _gttmmadr.size()));
|
||||||
|
|
||||||
log("Map res:", 0,
|
log("Map res:", 0,
|
||||||
" base:", Genode::Hex(_gttmmadr.base()),
|
" base:", Genode::Hex(_gttmmadr.base()),
|
||||||
" size:", Genode::Hex(_gttmmadr.size()),
|
" size:", Genode::Hex(_gttmmadr.size()),
|
||||||
" vaddr:", Genode::Hex(addr));
|
" vaddr:", Genode::Hex(_gttmmadr_local));
|
||||||
|
|
||||||
return addr;
|
return _gttmmadr_local;
|
||||||
}
|
}
|
||||||
|
|
||||||
template <typename T>
|
template <typename T>
|
||||||
@ -254,19 +286,24 @@ class Igd::Resources : Genode::Noncopyable
|
|||||||
|
|
||||||
void ack_irq() { (_obj.*_ack_irq)(); }
|
void ack_irq() { (_obj.*_ack_irq)(); }
|
||||||
|
|
||||||
|
Genode::Heap &heap() { return _heap; }
|
||||||
|
Timer::Connection &timer() { return _timer; };
|
||||||
|
addr_t scratch_page() const { return _scratch_page; }
|
||||||
|
|
||||||
Platform::Connection &platform() { return _platform; }
|
Platform::Connection &platform() { return _platform; }
|
||||||
Platform::Device_client &gpu_client() { return *_gpu_client; }
|
Platform::Device_client &gpu_client() { return *_gpu_client; }
|
||||||
Platform::Device_capability host_bridge_cap() { return _host_bridge_cap; }
|
Platform::Device_capability host_bridge_cap() { return _host_bridge_cap; }
|
||||||
|
Platform::Device_capability isa_bridge_cap() { return _isa_bridge_cap; }
|
||||||
|
unsigned isa_bridge_class() const { return 0x601u << 8; }
|
||||||
|
|
||||||
addr_t gmadr_base() const { return _gmadr.base(); }
|
addr_t gmadr_base() const { return _gmadr.base(); }
|
||||||
size_t gmadr_size() const { return _gmadr.size(); }
|
size_t gmadr_size() const { return _gmadr.size(); }
|
||||||
addr_t gttmmadr_base() const { return _gttmmadr.base(); }
|
addr_t gttmmadr_base() const { return _gttmmadr.base(); }
|
||||||
addr_t gttmmadr_size() const { return _gttmmadr.size(); }
|
size_t gttmmadr_size() const { return _gttmmadr.size(); }
|
||||||
|
|
||||||
size_t gmadr_platform_size() const { return APERTURE_RESERVED; }
|
size_t gmadr_platform_size() const { return APERTURE_RESERVED; }
|
||||||
size_t gttmmadr_platform_size() const { return GTT_RESERVED; }
|
size_t gttmmadr_platform_size() const { return GTT_RESERVED; }
|
||||||
|
|
||||||
|
|
||||||
Io_mem_dataspace_capability gttmmadr_platform_ds()
|
Io_mem_dataspace_capability gttmmadr_platform_ds()
|
||||||
{
|
{
|
||||||
using namespace Genode;
|
using namespace Genode;
|
||||||
@ -276,5 +313,19 @@ class Igd::Resources : Genode::Noncopyable
|
|||||||
|
|
||||||
return static_cap_cast<Io_mem_dataspace>(_gttmmadr_rm->dataspace());
|
return static_cap_cast<Io_mem_dataspace>(_gttmmadr_rm->dataspace());
|
||||||
}
|
}
|
||||||
|
|
||||||
|
void gtt_platform_reset()
|
||||||
|
{
|
||||||
|
addr_t const base = map_gttmmadr() + (gttmmadr_size() / 2);
|
||||||
|
Igd::Ggtt(mmio(), base, gttmmadr_platform_size(), 0, scratch_page(), 0);
|
||||||
|
}
|
||||||
|
|
||||||
|
Igd::Mmio &mmio()
|
||||||
|
{
|
||||||
|
if (!_mmio.constructed())
|
||||||
|
_mmio.construct(_delayer, map_gttmmadr());
|
||||||
|
|
||||||
|
return *_mmio;
|
||||||
|
}
|
||||||
};
|
};
|
||||||
|
|
||||||
|
Loading…
Reference in New Issue
Block a user