From 0c97c13562be304e42524f76f3691a498ba5d7e0 Mon Sep 17 00:00:00 2001 From: Alexander Boettcher Date: Thu, 6 Jun 2024 10:41:49 +0200 Subject: [PATCH] pci_decode: report pci bridge configuration as setup by firmware after boot. The information will/can be used by the platform driver to re-program bridges after a system suspend/resume cycle. Issue #5241 --- repos/os/src/app/pci_decode/main.cc | 24 +++++++++++++++++++++++- 1 file changed, 23 insertions(+), 1 deletion(-) diff --git a/repos/os/src/app/pci_decode/main.cc b/repos/os/src/app/pci_decode/main.cc index 52456875db..eb8d4156cd 100644 --- a/repos/os/src/app/pci_decode/main.cc +++ b/repos/os/src/app/pci_decode/main.cc @@ -160,6 +160,7 @@ bus_t Main::parse_pci_function(Bdf bdf, { using C = Config; using C0 = Config_type0; + using C1 = Config_type1; using Cc = Config::Class_code_rev_id; gen.attribute("address", string(cfg_phys_base)); @@ -171,7 +172,28 @@ bus_t Main::parse_pci_function(Bdf bdf, gen.attribute("class", string(cfg.read())); gen.attribute("revision", string(cfg.read())); gen.attribute("bridge", cfg.bridge() ? "yes" : "no"); - if (!cfg.bridge()) { + + if (cfg.bridge()) { + C1 cfg1(cfg.range()); + gen.attribute("io_base_limit", + string(cfg1.read())); + gen.attribute("memory_base", + string(cfg1.read())); + gen.attribute("memory_limit", + string(cfg1.read())); + gen.attribute("prefetch_memory_base", + string(cfg1.read())); + gen.attribute("prefetch_memory_base_upper", + string(cfg1.read())); + gen.attribute("prefetch_memory_limit_upper", + string(cfg1.read())); + gen.attribute("io_base_limit_upper", + string(cfg1.read())); + gen.attribute("expansion_rom_base", + string(cfg1.read())); + gen.attribute("bridge_control", + string(cfg1.read())); + } else { C0 cfg0(cfg.range()); gen.attribute("sub_vendor_id", string(cfg0.read()));