hw: unify board definitions of bootstrap/core

Ref #3326
This commit is contained in:
Stefan Kalkowski
2019-05-16 13:42:46 +02:00
committed by Christian Helmuth
parent 8eecb39792
commit 054df95ea4
42 changed files with 527 additions and 367 deletions

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@ -14,21 +14,10 @@
#ifndef _CORE__SPEC__ARNDALE__BOARD_H_
#define _CORE__SPEC__ARNDALE__BOARD_H_
/* base includes */
#include <drivers/defs/arndale.h>
#include <drivers/uart/exynos.h>
#include <hw/spec/arm/cortex_a15.h>
#include <hw/spec/arm/arndale_board.h>
namespace Board {
using namespace Arndale;
using Cpu_mmio = Hw::Cortex_a15_mmio<IRQ_CONTROLLER_BASE>;
using Serial = Genode::Exynos_uart;
enum {
UART_BASE = UART_2_MMIO_BASE,
UART_CLOCK = UART_2_CLOCK,
};
using namespace Hw::Arndale_board;
static constexpr bool SMP = true;
}

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@ -15,17 +15,10 @@
#ifndef _CORE__SPEC__IMX53_QSB__BOARD_H_
#define _CORE__SPEC__IMX53_QSB__BOARD_H_
#include <drivers/defs/imx53_qsb.h>
#include <drivers/uart/imx.h>
#include <hw/spec/arm/imx53_qsb_board.h>
namespace Board {
using namespace Imx53_qsb;
using Serial = Genode::Imx_uart;
enum {
UART_BASE = UART_1_MMIO_BASE,
UART_CLOCK = 0, /* ignored value */
};
using namespace Hw::Imx53_qsb_board;
static constexpr bool SMP = false;
}

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@ -14,23 +14,13 @@
#ifndef _CORE__SPEC__IMX6Q_SABRELITE__BOARD_H_
#define _CORE__SPEC__IMX6Q_SABRELITE__BOARD_H_
/* base includes */
#include <drivers/defs/imx6q_sabrelite.h>
#include <drivers/uart/imx.h>
#include <hw/spec/arm/cortex_a9.h>
#include <hw/spec/arm/pl310.h>
#include <hw/spec/arm/imx6q_sabrelite_board.h>
namespace Board {
using namespace Imx6q_sabrelite;
using Cpu_mmio = Hw::Cortex_a9_mmio<CORTEX_A9_PRIVATE_MEM_BASE>;
using L2_cache = Hw::Pl310;
using Serial = Genode::Imx_uart;
enum {
UART_BASE = UART_2_MMIO_BASE,
UART_CLOCK = 0, /* dummy value, not used */
};
using namespace Hw::Imx6q_sabrelite_board;
using L2_cache = Hw::Pl310;
static constexpr bool SMP = true;

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@ -14,22 +14,11 @@
#ifndef _CORE__SPEC__IMX7D_SABRE__BOARD_H_
#define _CORE__SPEC__IMX7D_SABRE__BOARD_H_
/* base includes */
#include <drivers/defs/imx7d_sabre.h>
#include <drivers/uart/imx.h>
#include <hw/spec/arm/cortex_a15.h>
#include <hw/spec/arm/imx7d_sabre_board.h>
namespace Board {
using namespace Imx7d_sabre;
using Cpu_mmio = Hw::Cortex_a15_mmio<IRQ_CONTROLLER_BASE>;
using Serial = Genode::Imx_uart;
enum {
UART_BASE = UART_1_MMIO_BASE,
UART_CLOCK = 0, /* unused value */
};
using namespace Hw::Imx7d_sabre_board;
static constexpr bool SMP = true;
}

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@ -14,23 +14,12 @@
#ifndef _CORE__SPEC__NIT6_SOLOX__BOARD_H_
#define _CORE__SPEC__NIT6_SOLOX__BOARD_H_
/* base includes */
#include <drivers/defs/nit6_solox.h>
#include <drivers/uart/imx.h>
#include <hw/spec/arm/cortex_a9.h>
#include <hw/spec/arm/pl310.h>
#include <hw/spec/arm/nit6_solox_board.h>
namespace Board {
using namespace Nit6_solox;
using Cpu_mmio = Hw::Cortex_a9_mmio<CORTEX_A9_PRIVATE_MEM_BASE>;
using L2_cache = Hw::Pl310;
using Serial = Genode::Imx_uart;
using namespace Hw::Nit6_solox_board;
enum {
UART_BASE = UART_1_MMIO_BASE,
UART_CLOCK = 0, /* dummy value, not used */
};
using L2_cache = Hw::Pl310;
static constexpr bool SMP = true;

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@ -14,21 +14,10 @@
#ifndef _CORE__SPEC__ODROID_XU__BOARD_H_
#define _CORE__SPEC__ODROID_XU__BOARD_H_
/* base includes */
#include <drivers/defs/odroid_xu.h>
#include <drivers/uart/exynos.h>
#include <hw/spec/arm/cortex_a15.h>
#include <hw/spec/arm/odroid_xu_board.h>
namespace Board {
using namespace Odroid_xu;
using Cpu_mmio = Hw::Cortex_a15_mmio<IRQ_CONTROLLER_BASE>;
using Serial = Genode::Exynos_uart;
enum {
UART_BASE = UART_2_MMIO_BASE,
UART_CLOCK = UART_2_CLOCK,
};
using namespace Hw::Odroid_xu_board;
static constexpr bool SMP = true;
}

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@ -15,25 +15,11 @@
#ifndef _CORE__SPEC__PANDA__BOARD_H_
#define _CORE__SPEC__PANDA__BOARD_H_
/* base includes */
#include <drivers/defs/panda.h>
#include <drivers/uart/tl16c750.h>
#include <hw/spec/arm/cortex_a9.h>
#include <hw/spec/arm/pl310.h>
#include <hw/spec/arm/panda_trustzone_firmware.h>
#include <hw/spec/arm/panda_board.h>
namespace Board {
using namespace Panda;
using Cpu_mmio = Hw::Cortex_a9_mmio<CORTEX_A9_PRIVATE_MEM_BASE>;
using Serial = Genode::Tl16c750_uart;
enum {
UART_BASE = TL16C750_3_MMIO_BASE,
UART_CLOCK = TL16C750_CLOCK,
};
using namespace Hw::Panda_board;
static constexpr bool SMP = true;
class L2_cache : public Hw::Pl310

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@ -14,24 +14,10 @@
#ifndef _CORE__SPEC__PBXA9__BOARD_H_
#define _CORE__SPEC__PBXA9__BOARD_H_
/* base includes */
#include <drivers/defs/pbxa9.h>
#include <drivers/uart/pl011.h>
#include <hw/spec/arm/cortex_a9.h>
#include <hw/spec/arm/pl310.h>
#include <hw/spec/arm/pbxa9_board.h>
namespace Board {
using namespace Pbxa9;
using Cpu_mmio = Hw::Cortex_a9_mmio<CORTEX_A9_PRIVATE_MEM_BASE>;
using L2_cache = Hw::Pl310;
using Serial = Genode::Pl011_uart;
enum {
UART_BASE = PL011_0_MMIO_BASE,
UART_CLOCK = PL011_0_CLOCK,
};
using namespace Hw::Pbxa9_board;
static constexpr bool SMP = true;

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@ -14,12 +14,10 @@
#ifndef _CORE__SPEC__RISCV__BOARD_H_
#define _CORE__SPEC__RISCV__BOARD_H_
#include <hw/spec/riscv/uart.h>
#include <hw/spec/riscv/board.h>
namespace Board {
enum { UART_BASE, UART_CLOCK };
struct Serial : Hw::Riscv_uart {
Serial(Genode::addr_t, Genode::size_t, unsigned) {} };
using namespace Hw::Riscv_board;
}
#endif /* _CORE__SPEC__RISCV__BOARD_H_ */

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@ -15,18 +15,10 @@
#ifndef _CORE__SPEC__RPI__BOARD_H_
#define _CORE__SPEC__RPI__BOARD_H_
#include <drivers/defs/rpi.h>
#include <drivers/uart/pl011.h>
#include <hw/spec/arm/rpi_board.h>
namespace Board {
using namespace Rpi;
using Serial = Genode::Pl011_uart;
enum {
UART_BASE = Rpi::PL011_0_MMIO_BASE,
UART_CLOCK = Rpi::PL011_0_CLOCK,
};
using namespace Hw::Rpi_board;
static constexpr bool SMP = false;
};

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@ -15,17 +15,10 @@
#ifndef _CORE__SPEC__USB_ARMORY__BOARD_H_
#define _CORE__SPEC__USB_ARMORY__BOARD_H_
#include <drivers/defs/usb_armory.h>
#include <drivers/uart/imx.h>
#include <hw/spec/arm/usb_armory_board.h>
namespace Board {
using namespace Usb_armory;
using Serial = Genode::Imx_uart;
enum {
UART_BASE = UART_1_MMIO_BASE,
UART_CLOCK = 0, /* dummy value, not used */
};
using namespace Hw::Usb_armory_board;
static constexpr bool SMP = false;
}

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@ -15,24 +15,13 @@
#ifndef _CORE__SPEC__WAND_QUAD__BOARD_H_
#define _CORE__SPEC__WAND_QUAD__BOARD_H_
/* base includes */
#include <drivers/defs/wand_quad.h>
#include <drivers/uart/imx.h>
#include <hw/spec/arm/cortex_a9.h>
#include <hw/spec/arm/pl310.h>
#include <hw/spec/arm/wand_quad_board.h>
namespace Board {
using namespace Wand_quad;
using Cpu_mmio = Hw::Cortex_a9_mmio<CORTEX_A9_PRIVATE_MEM_BASE>;
using namespace Hw::Wand_quad_board;
using L2_cache = Hw::Pl310;
using Serial = Genode::Imx_uart;
enum {
UART_BASE = UART_1_MMIO_BASE,
UART_CLOCK = 0, /* dummy value, not used */
};
static constexpr bool SMP = true;
L2_cache & l2_cache();

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@ -14,11 +14,10 @@
#ifndef _CORE__SPEC__X86_64__BOARD_H_
#define _CORE__SPEC__X86_64__BOARD_H_
#include <drivers/uart/x86_pc.h>
#include <hw/spec/x86_64/pc_board.h>
namespace Board {
struct Serial;
enum Dummies { UART_BASE, UART_CLOCK };
using namespace Hw::Pc_board;
enum {
VECTOR_REMAP_BASE = 48,
@ -28,9 +27,4 @@ namespace Board {
};
}
struct Board::Serial : Genode::X86_uart {
Serial(Genode::addr_t, Genode::size_t, unsigned);
};
#endif /* _CORE__SPEC__X86_64__BOARD_H_ */

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@ -16,22 +16,10 @@
#ifndef _CORE__SPEC__ZYNQ_QEMU__BOARD_H_
#define _CORE__SPEC__ZYNQ_QEMU__BOARD_H_
/* base includes */
#include <drivers/defs/zynq_qemu.h>
#include <drivers/uart/xilinx.h>
#include <hw/spec/arm/cortex_a9.h>
#include <hw/spec/arm/pl310.h>
#include <hw/spec/arm/zynq_qemu_board.h>
namespace Board {
using namespace Zynq_qemu;
using Cpu_mmio = Hw::Cortex_a9_mmio<CORTEX_A9_PRIVATE_MEM_BASE>;
using L2_cache = Hw::Pl310;
using Serial = Genode::Xilinx_uart;
enum {
UART_BASE = UART_0_MMIO_BASE,
};
using namespace Hw::Zynq_qemu_board;
static constexpr bool SMP = true;