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64 lines
1.6 KiB
C
64 lines
1.6 KiB
C
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/*
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* \brief PL011 UART definitions for the RealView platform
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* \author Christian Helmuth
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* \date 2011-05-27
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*/
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/*
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* Copyright (C) 2011 Genode Labs GmbH
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*
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* This file is part of the Genode OS framework, which is distributed
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* under the terms of the GNU General Public License version 2.
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*/
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#ifndef _INCLUDE__PLATFORM__PBXA9__PL011_DEFS_H_
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#define _INCLUDE__PLATFORM__PBXA9__PL011_DEFS_H_
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enum {
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/** Number of UARTs */
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PL011_NUM = 4,
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/**
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* MMIO regions
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*/
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PL011_PHYS0 = 0x10009000, /* base for UART 0 */
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PL011_PHYS1 = 0x1000a000, /* base for UART 1 */
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PL011_PHYS2 = 0x1000b000, /* base for UART 2 */
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PL011_PHYS3 = 0x1000c000, /* base for UART 3 */
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PL011_SIZE = 0x1000, /* size of each MMIO region */
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/**
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* Interrupt lines
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*/
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PL011_IRQ0 = 12 + 32, /* UART 0 */
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PL011_IRQ1 = 13 + 32, /* UART 1 */
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PL011_IRQ2 = 14 + 32, /* UART 2 */
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PL011_IRQ3 = 15 + 32, /* UART 3 */
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/**
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* UART baud rate configuration (precalculated)
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*
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* div = 24000000 / 16 / baud rate
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* IBRD = floor(div)
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* FBRD = floor((div - IBRD) * 64 + 0.5)
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*/
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PL011_IBRD_115200 = 13, PL011_FBRD_115200 = 1,
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PL011_IBRD_19200 = 78, PL011_FBRD_19200 = 8,
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PL011_IBRD_9600 = 156, PL011_FBRD_9600 = 16,
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};
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static struct Pl011_uart {
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Genode::addr_t mmio_base;
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Genode::size_t mmio_size;
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int irq_number;
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} pl011_uart[PL011_NUM] = {
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{ PL011_PHYS0, PL011_SIZE, PL011_IRQ0 },
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{ PL011_PHYS1, PL011_SIZE, PL011_IRQ1 },
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{ PL011_PHYS2, PL011_SIZE, PL011_IRQ2 },
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{ PL011_PHYS3, PL011_SIZE, PL011_IRQ3 },
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};
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#endif /* _INCLUDE__PLATFORM__PBXA9__PL011_DEFS_H_ */
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