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https://github.com/genodelabs/genode.git
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39 lines
1.4 KiB
Diff
39 lines
1.4 KiB
Diff
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diff --git a/dev/pci/azalia.c b/dev/pci/azalia.c
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index b126ef6..f73c238 100644
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--- a/dev/pci/azalia.c
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+++ b/dev/pci/azalia.c
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@@ -492,7 +492,7 @@ azalia_pci_attach(struct device *parent, struct device *self, void *aux)
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azalia_t *sc;
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struct pci_attach_args *pa;
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pcireg_t v;
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- uint8_t reg;
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+ // uint8_t reg;
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pci_intr_handle_t ih;
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const char *interrupt_str;
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@@ -518,12 +518,18 @@ azalia_pci_attach(struct device *parent, struct device *self, void *aux)
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azalia_configure_pci(sc);
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- /* disable MSI, use INTx instead */
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- if (PCI_VENDOR(sc->pciid) == PCI_VENDOR_INTEL) {
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- reg = azalia_pci_read(sc->pc, sc->tag, ICH_PCI_MMC);
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- reg &= ~(ICH_PCI_MMC_ME);
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- azalia_pci_write(sc->pc, sc->tag, ICH_PCI_MMC, reg);
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- }
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+ // This was added in CVS rev 1.168 because certain devices do not
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+ // support MSIs. For reasons that are not clear yet, this breaks
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+ // when using the platform_drv on x86 with MSI support and IOMMU
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+ // enabled. All hw we tested seems to work fine when it is removed,
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+ // even older kernels, e.g. OKL4, that use legacy IRQs,
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+ //
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+ // /* disable MSI, use INTx instead */
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+ // if (PCI_VENDOR(sc->pciid) == PCI_VENDOR_INTEL) {
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+ // reg = azalia_pci_read(sc->pc, sc->tag, ICH_PCI_MMC);
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+ // reg &= ~(ICH_PCI_MMC_ME);
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+ // azalia_pci_write(sc->pc, sc->tag, ICH_PCI_MMC, reg);
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+ // }
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/* interrupt */
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if (pci_intr_map_msi(pa, &ih) && pci_intr_map(pa, &ih)) {
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