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1906cf93f8
You might just say: 'Yeah! crosstool-NG's got its own repo!". Unfortunately, that's because the previous repo got damaged beyond repair and I had no backup. That means I'm putting backups in place in the afternoon. That also means we've lost history... :-(
150 lines
5.3 KiB
Diff
150 lines
5.3 KiB
Diff
See http://gcc.gnu.org/PR16201
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Should fix "bad immediate value for offset" errors for several flavors of arm, e.g.
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/tmp/ccmdoQyg.s: Assembler messages:
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/tmp/ccmdoQyg.s:6235: Error: bad immediate value for offset (4096)
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make[2]: *** [crosstool-0.32/build/arm-xscale-linux-gnu/gcc-3.4.3-glibc-2.3.3/build-glibc/locale/ld-collate.o] Error 1
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/tmp/cc0c7qop.s: Assembler messages:
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/tmp/cc0c7qop.s:6234: Error: bad immediate value for offset (4104)
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make[2]: *** [crosstool-0.32/build/armv5b-softfloat-linux/gcc-3.4.3-glibc-2.3.3/build-glibc/locale/ld-collate.o] Error 1
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CVSROOT: /cvs/gcc
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Module name: gcc
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Branch: gcc-3_4-branch
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Changes by: rearnsha@gcc.gnu.org 2005-02-01 15:07:05
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Modified files:
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gcc : ChangeLog
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gcc/config/arm : arm-protos.h arm.c
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Log message:
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PR target/16201
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* arm.c (arm_eliminable_register): New function.
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(adjacent_mem_locations): Don't allow eliminable registers. Use
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HOST_WIDE_INT for address offsets.
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* arm-protos.h (arm_eliminable_register): Add prototype.
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Patches:
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http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/ChangeLog.diff?cvsroot=gcc&only_with_tag=gcc-3_4-branch&r1=2.2326.2.790&r2=2.2326.2.791
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http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/config/arm/arm-protos.h.diff?cvsroot=gcc&only_with_tag=gcc-3_4-branch&r1=1.61&r2=1.61.4.1
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http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/config/arm/arm.c.diff?cvsroot=gcc&only_with_tag=gcc-3_4-branch&r1=1.317.4.8&r2=1.317.4.9
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===================================================================
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RCS file: /cvs/gcc/gcc/gcc/config/arm/arm-protos.h,v
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retrieving revision 1.61
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retrieving revision 1.61.4.1
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diff -u -r1.61 -r1.61.4.1
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--- gcc/gcc/config/arm/arm-protos.h 2003/11/20 11:44:18 1.61
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+++ gcc/gcc/config/arm/arm-protos.h 2005/02/01 15:07:02 1.61.4.1
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@@ -1,5 +1,6 @@
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/* Prototypes for exported functions defined in arm.c and pe.c
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- Copyright (C) 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
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+ Copyright (C) 1999, 2000, 2001, 2002, 2003, 2005
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+ Free Software Foundation, Inc.
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Contributed by Richard Earnshaw (rearnsha@arm.com)
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Minor hacks by Nick Clifton (nickc@cygnus.com)
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@@ -138,6 +139,7 @@
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extern int arm_is_longcall_p (rtx, int, int);
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extern int arm_emit_vector_const (FILE *, rtx);
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extern const char * arm_output_load_gr (rtx *);
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+extern int arm_eliminable_register (rtx);
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#if defined TREE_CODE
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extern rtx arm_function_arg (CUMULATIVE_ARGS *, enum machine_mode, tree, int);
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===================================================================
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RCS file: /cvs/gcc/gcc/gcc/config/arm/arm.c,v
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retrieving revision 1.317.4.8
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retrieving revision 1.317.4.9
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diff -u -r1.317.4.8 -r1.317.4.9
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--- gcc/gcc/config/arm/arm.c 2004/04/29 19:52:41 1.317.4.8
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+++ gcc/gcc/config/arm/arm.c 2005/02/01 15:07:02 1.317.4.9
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@@ -1,6 +1,6 @@
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/* Output routines for GCC for ARM.
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Copyright (C) 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001,
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- 2002, 2003, 2004 Free Software Foundation, Inc.
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+ 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
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Contributed by Pieter `Tiggr' Schoenmakers (rcpieter@win.tue.nl)
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and Martin Simmons (@harleqn.co.uk).
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More major hacks by Richard Earnshaw (rearnsha@arm.com).
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@@ -4056,6 +4056,16 @@
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&& INTVAL (op) < 64);
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}
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+/* Return true if X is a register that will be eliminated later on. */
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+int
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+arm_eliminable_register (rtx x)
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+{
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+ return REG_P (x) && (REGNO (x) == FRAME_POINTER_REGNUM
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+ || REGNO (x) == ARG_POINTER_REGNUM
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+ || (REGNO (x) >= FIRST_VIRTUAL_REGISTER
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+ && REGNO (x) <= LAST_VIRTUAL_REGISTER));
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+}
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+
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/* Returns TRUE if INSN is an "LDR REG, ADDR" instruction.
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Use by the Cirrus Maverick code which has to workaround
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a hardware bug triggered by such instructions. */
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@@ -4569,33 +4579,42 @@
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|| (GET_CODE (XEXP (b, 0)) == PLUS
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&& GET_CODE (XEXP (XEXP (b, 0), 1)) == CONST_INT)))
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{
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- int val0 = 0, val1 = 0;
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- int reg0, reg1;
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-
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+ HOST_WIDE_INT val0 = 0, val1 = 0;
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+ rtx reg0, reg1;
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+ int val_diff;
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+
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if (GET_CODE (XEXP (a, 0)) == PLUS)
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{
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- reg0 = REGNO (XEXP (XEXP (a, 0), 0));
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+ reg0 = XEXP (XEXP (a, 0), 0);
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val0 = INTVAL (XEXP (XEXP (a, 0), 1));
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}
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else
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- reg0 = REGNO (XEXP (a, 0));
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+ reg0 = XEXP (a, 0);
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if (GET_CODE (XEXP (b, 0)) == PLUS)
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{
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- reg1 = REGNO (XEXP (XEXP (b, 0), 0));
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+ reg1 = XEXP (XEXP (b, 0), 0);
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val1 = INTVAL (XEXP (XEXP (b, 0), 1));
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}
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else
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- reg1 = REGNO (XEXP (b, 0));
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+ reg1 = XEXP (b, 0);
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/* Don't accept any offset that will require multiple
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instructions to handle, since this would cause the
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arith_adjacentmem pattern to output an overlong sequence. */
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if (!const_ok_for_op (PLUS, val0) || !const_ok_for_op (PLUS, val1))
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return 0;
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-
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- return (reg0 == reg1) && ((val1 - val0) == 4 || (val0 - val1) == 4);
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+
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+ /* Don't allow an eliminable register: register elimination can make
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+ the offset too large. */
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+ if (arm_eliminable_register (reg0))
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+ return 0;
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+
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+ val_diff = val1 - val0;
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+ return ((REGNO (reg0) == REGNO (reg1))
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+ && (val_diff == 4 || val_diff == -4));
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}
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+
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return 0;
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}
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@@ -7301,7 +7320,6 @@
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return "";
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}
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-
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/* Output a move from arm registers to an fpa registers.
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OPERANDS[0] is an fpa register.
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OPERANDS[1] is the first registers of an arm register pair. */
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