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c175b21ce4
Bring in the fixes for GCC 7 through 13. https://rtx.meta.security/mitigation/2023/09/12/CVE-2023-4039.html https://developer.arm.com/Arm%20Security%20Center/GCC%20Stack%20Protector%20Vulnerability%20AArch64 Signed-off-by: Chris Packham <judge.packham@gmail.com>
85 lines
3.4 KiB
Diff
85 lines
3.4 KiB
Diff
From 82f6b3e1b596ef0f4e3ac3bb9c6e88fb4458f402 Mon Sep 17 00:00:00 2001
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From: Richard Sandiford <richard.sandiford@arm.com>
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Date: Tue, 12 Sep 2023 16:07:14 +0100
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Subject: [PATCH 18/32] aarch64: Add bytes_below_hard_fp to frame info
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Following on from the previous bytes_below_saved_regs patch, this one
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records the number of bytes that are below the hard frame pointer.
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This eventually replaces below_hard_fp_saved_regs_size.
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If a frame pointer is not needed, the epilogue adds final_adjust
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to the stack pointer before restoring registers:
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aarch64_add_sp (tmp1_rtx, tmp0_rtx, final_adjust, true);
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Therefore, if the epilogue needs to restore the stack pointer from
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the hard frame pointer, the directly corresponding offset is:
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-bytes_below_hard_fp + final_adjust
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i.e. go from the hard frame pointer to the bottom of the frame,
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then add the same amount as if we were using the stack pointer
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from the outset.
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gcc/
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* config/aarch64/aarch64.h (aarch64_frame::bytes_below_hard_fp): New
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field.
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* config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize it.
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(aarch64_expand_epilogue): Use it instead of
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below_hard_fp_saved_regs_size.
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---
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gcc/config/aarch64/aarch64.cc | 6 +++---
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gcc/config/aarch64/aarch64.h | 5 +++++
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2 files changed, 8 insertions(+), 3 deletions(-)
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diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
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index dacc2b0e4dd2..a3f7aabcc594 100644
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--- a/gcc/config/aarch64/aarch64.cc
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+++ b/gcc/config/aarch64/aarch64.cc
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@@ -8530,6 +8530,7 @@ aarch64_layout_frame (void)
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of the callee save area. */
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bool saves_below_hard_fp_p = maybe_ne (offset, 0);
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frame.below_hard_fp_saved_regs_size = offset;
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+ frame.bytes_below_hard_fp = offset + frame.bytes_below_saved_regs;
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if (frame.emit_frame_chain)
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{
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/* FP and LR are placed in the linkage record. */
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@@ -10171,8 +10172,7 @@ aarch64_expand_epilogue (bool for_sibcall)
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poly_int64 final_adjust = frame.final_adjust;
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poly_int64 callee_offset = frame.callee_offset;
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poly_int64 sve_callee_adjust = frame.sve_callee_adjust;
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- poly_int64 below_hard_fp_saved_regs_size
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- = frame.below_hard_fp_saved_regs_size;
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+ poly_int64 bytes_below_hard_fp = frame.bytes_below_hard_fp;
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unsigned reg1 = frame.wb_pop_candidate1;
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unsigned reg2 = frame.wb_pop_candidate2;
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unsigned int last_gpr = (frame.is_scs_enabled
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@@ -10230,7 +10230,7 @@ aarch64_expand_epilogue (bool for_sibcall)
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is restored on the instruction doing the writeback. */
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aarch64_add_offset (Pmode, stack_pointer_rtx,
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hard_frame_pointer_rtx,
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- -callee_offset - below_hard_fp_saved_regs_size,
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+ -bytes_below_hard_fp + final_adjust,
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tmp1_rtx, tmp0_rtx, callee_adjust == 0);
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else
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/* The case where we need to re-use the register here is very rare, so
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diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h
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index 0b6faa3ddf17..4263d29d29d7 100644
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--- a/gcc/config/aarch64/aarch64.h
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+++ b/gcc/config/aarch64/aarch64.h
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@@ -786,6 +786,11 @@ struct GTY (()) aarch64_frame
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are saved below the hard frame pointer. */
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poly_int64 below_hard_fp_saved_regs_size;
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+ /* The number of bytes between the bottom of the static frame (the bottom
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+ of the outgoing arguments) and the hard frame pointer. This value is
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+ always a multiple of STACK_BOUNDARY. */
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+ poly_int64 bytes_below_hard_fp;
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+
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/* Offset from the base of the frame (incomming SP) to the
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top of the locals area. This value is always a multiple of
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STACK_BOUNDARY. */
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--
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2.42.0
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