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8099a74750
Here we add a couple of fixes and improvements for ARC processors. All except 1 patch are already in the upstream "master" branch and will be an essential part of GCC 11.x whenever it gets released. The most important are first 4 patches (0005-0008) which introduce support of full native GDB support in Linux on ARC. And the rests are tiny, yet useful improvements. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
289 lines
9.9 KiB
Diff
289 lines
9.9 KiB
Diff
From 8b8464d228b46a2abd677a0a440e0d08da75df0b Mon Sep 17 00:00:00 2001
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From: Shahab Vahedi <shahab@synopsys.com>
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Date: Wed, 2 Jun 2021 15:30:16 +0300
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Subject: [PATCH 16/20] arc: Construct disassembler options dynamically
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The idea of this change is simple: Populate a data structure, namely
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"disasm_option_and_arg_t" from "include/dis-asm.h", to encompass the
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disassembly options and their possible arguments.
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This will make it easier to manage or extend those options by adapting
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entries in a data structure, "arc_options". There will be lesser need
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to hard-code the options in the code itself. Moreover, ARC GDB will
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use this population function, "disassembler_options_arc ()", to enable
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the "set disassembler-option" for ARC targets. The gdb change will be
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in a separate patch though.
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The changes in this patch can be divided into:
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1) Introduction of "disassembler_options_arc ()" that will return a
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"disasm_option_and_arg_t" structure representing the disassembly
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options and their likely arguments.
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2) New data type "arc_options_arg_t" and new data "arc_options".
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These are the internals for keeping track of options and arguments
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entries that can easily be extended.
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3) To print the options, the "print_arc_disassembler_options ()" has
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been adjusted to use this dynamically built structure instead of having
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them hard-coded inside.
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To see this in effect, one can look into the output of:
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$ ./binutils/objdump --help
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...
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The following ARC specific disassembler options are...
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...
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include/ChangeLog:
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* dis-asm.h (disassembler_options_arc): New prototype.
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opcodes/ChangeLog:
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* arc-dis.c (arc_option_arg_t): New enumeration.
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(arc_options): New variable.
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(disassembler_options_arc): New function.
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(print_arc_disassembler_options): Reimplement in terms of
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"disassembler_options_arc".
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Will be a part of GDB 11:
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https://sourceware.org/git?p=binutils-gdb.git;a=commit;h=8f467114435286e4f78b16fc1f5864acf6488fc0
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---
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include/ChangeLog | 4 +
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include/dis-asm.h | 1
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opcodes/ChangeLog | 8 ++
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opcodes/arc-dis.c | 180 +++++++++++++++++++++++++++++++++++++++++++++---------
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4 files changed, 166 insertions(+), 27 deletions(-)
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--- a/include/ChangeLog
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+++ b/include/ChangeLog
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@@ -1,3 +1,7 @@
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+2021-06-02 Shahab Vahedi <shahab@synopsys.com>
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+
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+ * dis-asm.h (disassembler_options_arc): New prototype.
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+
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2020-09-12 H.J. Lu <hongjiu.lu@intel.com>
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PR ld/26391
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--- a/include/dis-asm.h
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+++ b/include/dis-asm.h
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@@ -311,6 +311,7 @@
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extern void disassemble_init_s390 (struct disassemble_info *);
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extern void disassemble_init_wasm32 (struct disassemble_info *);
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extern void disassemble_init_nds32 (struct disassemble_info *);
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+extern const disasm_options_and_args_t *disassembler_options_arc (void);
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extern const disasm_options_and_args_t *disassembler_options_arm (void);
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extern const disasm_options_and_args_t *disassembler_options_mips (void);
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extern const disasm_options_and_args_t *disassembler_options_powerpc (void);
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--- a/opcodes/ChangeLog
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+++ b/opcodes/ChangeLog
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@@ -1,3 +1,11 @@
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+2021-06-02 Shahab Vahedi <shahab@synopsys.com>
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+
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+ * arc-dis.c (arc_option_arg_t): New enumeration.
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+ (arc_options): New variable.
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+ (disassembler_options_arc): New function.
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+ (print_arc_disassembler_options): Reimplement in terms of
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+ "disassembler_options_arc".
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+
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2020-10-22 Andrew Burgess <andrew.burgess@embecosm.com>
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* csky-dis.c (csky_get_disassembler): Don't return NULL when there
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--- a/opcodes/arc-dis.c
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+++ b/opcodes/arc-dis.c
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@@ -1412,41 +1412,167 @@
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return print_insn_arc;
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}
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+/* Indices into option argument vector for options that do require
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+ an argument. Use ARC_OPTION_ARG_NONE for options that don't
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+ expect an argument. */
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+typedef enum
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+{
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+ ARC_OPTION_ARG_NONE = -1,
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+ ARC_OPTION_ARG_ARCH,
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+ ARC_OPTION_ARG_SIZE
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+} arc_option_arg_t;
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+
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+/* Valid ARC disassembler options. */
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+static struct
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+{
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+ const char *name;
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+ const char *description;
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+ arc_option_arg_t arg;
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+} arc_options[] =
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+{
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+ { "cpu=", N_("Enforce the designated architecture while decoding."),
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+ ARC_OPTION_ARG_ARCH },
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+ { "dsp", N_("Recognize DSP instructions."),
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+ ARC_OPTION_ARG_NONE },
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+ { "spfp", N_("Recognize FPX SP instructions."),
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+ ARC_OPTION_ARG_NONE },
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+ { "dpfp", N_("Recognize FPX DP instructions."),
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+ ARC_OPTION_ARG_NONE },
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+ { "quarkse_em", N_("Recognize FPU QuarkSE-EM instructions."),
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+ ARC_OPTION_ARG_NONE },
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+ { "fpuda", N_("Recognize double assist FPU instructions."),
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+ ARC_OPTION_ARG_NONE },
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+ { "fpus", N_("Recognize single precision FPU instructions."),
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+ ARC_OPTION_ARG_NONE },
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+ { "fpud", N_("Recognize double precision FPU instructions."),
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+ ARC_OPTION_ARG_NONE },
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+ { "nps400", N_("Recognize NPS400 instructions."),
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+ ARC_OPTION_ARG_NONE },
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+ { "hex", N_("Use only hexadecimal number to print immediates."),
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+ ARC_OPTION_ARG_NONE }
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+};
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+
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+/* Populate the structure for representing ARC's disassembly options.
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+ Such a dynamic initialization is desired, because it makes the maintenance
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+ easier and also gdb uses this to enable the "disassembler-option". */
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+
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+const disasm_options_and_args_t *
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+disassembler_options_arc (void)
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+{
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+ static disasm_options_and_args_t *opts_and_args;
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+
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+ if (opts_and_args == NULL)
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+ {
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+ disasm_option_arg_t *args;
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+ disasm_options_t *opts;
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+ size_t i;
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+ const size_t nr_of_options = ARRAY_SIZE (arc_options);
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+ /* There is a null element at the end of CPU_TYPES, therefore
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+ NR_OF_CPUS is actually 1 more and that is desired here too. */
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+ const size_t nr_of_cpus = ARRAY_SIZE (cpu_types);
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+
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+ opts_and_args = XNEW (disasm_options_and_args_t);
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+ opts_and_args->args
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+ = XNEWVEC (disasm_option_arg_t, ARC_OPTION_ARG_SIZE + 1);
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+ opts_and_args->options.name
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+ = XNEWVEC (const char *, nr_of_options + 1);
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+ opts_and_args->options.description
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+ = XNEWVEC (const char *, nr_of_options + 1);
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+ opts_and_args->options.arg
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+ = XNEWVEC (const disasm_option_arg_t *, nr_of_options + 1);
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+
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+ /* Populate the arguments for "cpu=" option. */
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+ args = opts_and_args->args;
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+ args[ARC_OPTION_ARG_ARCH].name = "ARCH";
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+ args[ARC_OPTION_ARG_ARCH].values = XNEWVEC (const char *, nr_of_cpus);
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+ for (i = 0; i < nr_of_cpus; ++i)
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+ args[ARC_OPTION_ARG_ARCH].values[i] = cpu_types[i].name;
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+ args[ARC_OPTION_ARG_SIZE].name = NULL;
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+ args[ARC_OPTION_ARG_SIZE].values = NULL;
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+
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+ /* Populate the options. */
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+ opts = &opts_and_args->options;
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+ for (i = 0; i < nr_of_options; ++i)
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+ {
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+ opts->name[i] = arc_options[i].name;
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+ opts->description[i] = arc_options[i].description;
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+ if (arc_options[i].arg != ARC_OPTION_ARG_NONE)
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+ opts->arg[i] = &args[arc_options[i].arg];
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+ else
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+ opts->arg[i] = NULL;
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+ }
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+ opts->name[nr_of_options] = NULL;
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+ opts->description[nr_of_options] = NULL;
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+ opts->arg[nr_of_options] = NULL;
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+ }
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+
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+ return opts_and_args;
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+}
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+
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+
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void
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print_arc_disassembler_options (FILE *stream)
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{
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- int i;
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+ const disasm_options_and_args_t *opts_and_args;
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+ const disasm_option_arg_t *args;
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+ const disasm_options_t *opts;
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+ size_t i, j;
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+ size_t max_len = 0;
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+
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+ opts_and_args = disassembler_options_arc ();
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+ opts = &opts_and_args->options;
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+ args = opts_and_args->args;
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- fprintf (stream, _("\n\
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-The following ARC specific disassembler options are supported for use \n\
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-with -M switch (multiple options should be separated by commas):\n"));
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+ fprintf (stream, _("\nThe following ARC specific disassembler options are"
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+ " supported for use \nwith the -M switch (multiple"
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+ " options should be separated by commas):\n"));
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+
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+ /* Find the maximum length for printing options (and their arg name). */
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+ for (i = 0; opts->name[i] != NULL; ++i)
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+ {
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+ size_t len = strlen (opts->name[i]);
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+ len += (opts->arg[i]) ? strlen (opts->arg[i]->name) : 0;
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+ max_len = (len > max_len) ? len : max_len;
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+ }
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+
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+ /* Print the options, their arg and description, if any. */
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+ for (i = 0, ++max_len; opts->name[i] != NULL; ++i)
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+ {
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+ fprintf (stream, " %s", opts->name[i]);
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+ if (opts->arg[i] != NULL)
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+ fprintf (stream, "%s", opts->arg[i]->name);
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+ if (opts->description[i] != NULL)
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+ {
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+ size_t len = strlen (opts->name[i]);
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+ len += (opts->arg[i]) ? strlen (opts->arg[i]->name) : 0;
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+ fprintf (stream,
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+ "%*c %s", (int) (max_len - len), ' ', opts->description[i]);
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+ }
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+ fprintf (stream, _("\n"));
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+ }
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- /* cpu=... options. */
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- for (i = 0; cpu_types[i].name; ++i)
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+ /* Print the possible values of an argument. */
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+ for (i = 0; args[i].name != NULL; ++i)
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{
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- /* As of now all value CPU values are less than 16 characters. */
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- fprintf (stream, " cpu=%-16s\tEnforce %s ISA.\n",
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- cpu_types[i].name, cpu_types[i].isa);
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+ size_t len = 3;
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+ fprintf (stream, _("\n\
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+ For the options above, the following values are supported for \"%s\":\n "),
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+ args[i].name);
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+ for (j = 0; args[i].values[j] != NULL; ++j)
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+ {
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+ fprintf (stream, " %s", args[i].values[j]);
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+ len += strlen (args[i].values[j]) + 1;
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+ /* reset line if printed too long. */
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+ if (len >= 78)
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+ {
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+ fprintf (stream, _("\n "));
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+ len = 3;
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+ }
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+ }
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+ fprintf (stream, _("\n"));
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}
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- fprintf (stream, _("\
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- dsp Recognize DSP instructions.\n"));
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- fprintf (stream, _("\
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- spfp Recognize FPX SP instructions.\n"));
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- fprintf (stream, _("\
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- dpfp Recognize FPX DP instructions.\n"));
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- fprintf (stream, _("\
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- quarkse_em Recognize FPU QuarkSE-EM instructions.\n"));
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- fprintf (stream, _("\
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- fpuda Recognize double assist FPU instructions.\n"));
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- fprintf (stream, _("\
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- fpus Recognize single precision FPU instructions.\n"));
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- fprintf (stream, _("\
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- fpud Recognize double precision FPU instructions.\n"));
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- fprintf (stream, _("\
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- nps400 Recognize NPS400 instructions.\n"));
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- fprintf (stream, _("\
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- hex Use only hexadecimal number to print immediates.\n"));
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+ fprintf (stream, _("\n"));
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}
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void arc_insn_decode (bfd_vma addr,
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