mirror of
https://github.com/crosstool-ng/crosstool-ng.git
synced 2024-12-22 06:07:49 +00:00
b60a8806c6
/trunk/patches/glibc/2_9/500-ppc-glibc-2.9-atomic.patch | 414 414 0 0 ++++++++++ /trunk/patches/glibc/2_9/140-regex-BZ9697.patch | 111 111 0 0 +++ /trunk/patches/glibc/2_9/190-queue-header-updates.patch | 89 89 0 0 ++ /trunk/patches/glibc/2_9/370-hppa_glibc-2.7-hppa-nptl-carlos.patch | 249 249 0 0 ++++++ /trunk/patches/glibc/2_9/450-alpha-glibc-2.5-no-page-header.patch | 32 32 0 0 + /trunk/patches/glibc/2_9/270-ldbl-nexttowardf.patch | 68 68 0 0 ++ /trunk/patches/glibc/2_9/330-2.3.3-china.patch | 35 35 0 0 + /trunk/patches/glibc/2_9/340-new-valencian-locale.patch | 120 120 0 0 +++ /trunk/patches/glibc/2_9/410-2.9-fnmatch.patch | 64 64 0 0 ++ /trunk/patches/glibc/2_9/350-2.4-undefine-__i686.patch | 47 47 0 0 + /trunk/patches/glibc/2_9/160-i386-x86_64-revert-clone-cfi.patch | 53 53 0 0 + /trunk/patches/glibc/2_9/420-dont-build-timezone.patch | 19 19 0 0 + /trunk/patches/glibc/2_9/150-regex-BZ697.patch | 28 28 0 0 + /trunk/patches/glibc/2_9/290-no-inline-gmon.patch | 38 38 0 0 + /trunk/patches/glibc/2_9/280-section-comments.patch | 29 29 0 0 + /trunk/patches/glibc/2_9/180-math-tests.patch | 72 72 0 0 ++ /trunk/patches/glibc/2_9/120-_nss_dns_gethostbyaddr2_r-check-and-adjust-the-buffer-alignment.patch | 35 35 0 0 + /trunk/patches/glibc/2_9/250-resolv-dynamic.patch | 44 44 0 0 + /trunk/patches/glibc/2_9/300-2.9-check_native-headers.patch | 22 22 0 0 + /trunk/patches/glibc/2_9/310-2.3.6-fix-pr631.patch | 50 50 0 0 + /trunk/patches/glibc/2_9/130-add_prio-macros.patch | 26 26 0 0 + /trunk/patches/glibc/2_9/260-fadvise64_64.patch | 30 30 0 0 + /trunk/patches/glibc/2_9/440-alpha-glibc-2.4-xstat.patch | 249 249 0 0 ++++++ /trunk/patches/glibc/2_9/170-2.10-dns-no-gethostbyname4.patch | 35 35 0 0 + /trunk/patches/glibc/2_9/230-2.3.3-localedef-fix-trampoline.patch | 74 74 0 0 ++ /trunk/patches/glibc/2_9/360-2.8-nscd-one-fork.patch | 45 45 0 0 + /trunk/patches/glibc/2_9/480-alpha-glibc-2.8-cache-shape.patch | 18 18 0 0 + /trunk/patches/glibc/2_9/210-2.9-strlen-hack.patch | 109 109 0 0 +++ /trunk/patches/glibc/2_9/320-2.9-assume-pipe2.patch | 59 59 0 0 + /trunk/patches/glibc/2_9/100-ssp-compat.patch | 193 193 0 0 +++++ /trunk/patches/glibc/2_9/110-respect-env-CPPFLAGS.patch | 30 30 0 0 + /trunk/patches/glibc/2_9/220-manual-no-perl.patch | 29 29 0 0 + /trunk/patches/glibc/2_9/390-2.3.3_pre20040117-pt_pax.patch | 35 35 0 0 + /trunk/patches/glibc/2_9/460-alpha-glibc-2.5-no-asm-elf-header.patch | 38 38 0 0 + /trunk/patches/glibc/2_9/400-tests-sandbox-libdl-paths.patch | 198 198 0 0 +++++ /trunk/patches/glibc/2_9/240-i386-LOAD_PIC_REG.patch | 23 23 0 0 + /trunk/patches/glibc/2_9/200-awk-in-C-locale.patch | 23 23 0 0 + /trunk/patches/glibc/2_9/430-2.7-cross-compile-nptl.patch | 57 57 0 0 + /trunk/patches/glibc/2_9/380-2.3.6-dl_execstack-PaX-support.patch | 71 71 0 0 ++ /trunk/patches/glibc/2_9/490-ptr-mangling.patch | 114 114 0 0 +++ /trunk/patches/glibc/2_9/470-alpha-glibc-2.8-creat.patch | 19 19 0 0 + 41 files changed, 3094 insertions(+)
415 lines
16 KiB
Diff
415 lines
16 KiB
Diff
Original patch from: gentoo/src/patchsets/glibc/2.9/6120_all_ppc-glibc-2.9-atomic.patch
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-= BEGIN original header =-
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sniped from suse
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-= END original header =-
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diff -durN glibc-2_9.orig/sysdeps/powerpc/bits/atomic.h glibc-2_9/sysdeps/powerpc/bits/atomic.h
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--- glibc-2_9.orig/sysdeps/powerpc/bits/atomic.h 2007-03-26 22:15:28.000000000 +0200
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+++ glibc-2_9/sysdeps/powerpc/bits/atomic.h 2009-02-02 22:01:40.000000000 +0100
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@@ -85,14 +85,14 @@
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__typeof (*(mem)) __tmp; \
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__typeof (mem) __memp = (mem); \
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__asm __volatile ( \
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- "1: lwarx %0,0,%1" MUTEX_HINT_ACQ "\n" \
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+ "1: lwarx %0,%y1" MUTEX_HINT_ACQ "\n" \
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" cmpw %0,%2\n" \
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" bne 2f\n" \
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- " stwcx. %3,0,%1\n" \
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+ " stwcx. %3,%y1\n" \
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" bne- 1b\n" \
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"2: " __ARCH_ACQ_INSTR \
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- : "=&r" (__tmp) \
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- : "b" (__memp), "r" (oldval), "r" (newval) \
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+ : "=&r" (__tmp), "+Z" (*__memp) \
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+ : "r" (oldval), "r" (newval) \
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: "cr0", "memory"); \
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__tmp; \
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})
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@@ -102,14 +102,14 @@
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__typeof (*(mem)) __tmp; \
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__typeof (mem) __memp = (mem); \
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__asm __volatile (__ARCH_REL_INSTR "\n" \
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- "1: lwarx %0,0,%1" MUTEX_HINT_REL "\n" \
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+ "1: lwarx %0,%y1" MUTEX_HINT_REL "\n" \
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" cmpw %0,%2\n" \
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" bne 2f\n" \
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- " stwcx. %3,0,%1\n" \
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+ " stwcx. %3,%y1\n" \
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" bne- 1b\n" \
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"2: " \
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- : "=&r" (__tmp) \
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- : "b" (__memp), "r" (oldval), "r" (newval) \
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+ : "=&r" (__tmp), "+Z" (__memp) \
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+ : "r" (oldval), "r" (newval) \
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: "cr0", "memory"); \
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__tmp; \
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})
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@@ -118,12 +118,12 @@
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({ \
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__typeof (*mem) __val; \
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__asm __volatile ( \
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- "1: lwarx %0,0,%2" MUTEX_HINT_ACQ "\n" \
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- " stwcx. %3,0,%2\n" \
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+ "1: lwarx %0,%y1" MUTEX_HINT_ACQ "\n" \
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+ " stwcx. %2,%y1\n" \
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" bne- 1b\n" \
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" " __ARCH_ACQ_INSTR \
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- : "=&r" (__val), "=m" (*mem) \
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- : "b" (mem), "r" (value), "m" (*mem) \
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+ : "=&r" (__val), "+Z" (*mem) \
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+ : "r" (value) \
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: "cr0", "memory"); \
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__val; \
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})
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@@ -132,11 +132,11 @@
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({ \
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__typeof (*mem) __val; \
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__asm __volatile (__ARCH_REL_INSTR "\n" \
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- "1: lwarx %0,0,%2" MUTEX_HINT_REL "\n" \
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- " stwcx. %3,0,%2\n" \
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+ "1: lwarx %0,%y1" MUTEX_HINT_REL "\n" \
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+ " stwcx. %2,%y1\n" \
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" bne- 1b" \
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- : "=&r" (__val), "=m" (*mem) \
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- : "b" (mem), "r" (value), "m" (*mem) \
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+ : "=&r" (__val), "+Z" (*mem) \
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+ : "r" (value) \
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: "cr0", "memory"); \
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__val; \
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})
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@@ -144,12 +144,12 @@
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#define __arch_atomic_exchange_and_add_32(mem, value) \
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({ \
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__typeof (*mem) __val, __tmp; \
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- __asm __volatile ("1: lwarx %0,0,%3\n" \
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- " add %1,%0,%4\n" \
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- " stwcx. %1,0,%3\n" \
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+ __asm __volatile ("1: lwarx %0,%y2\n" \
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+ " add %1,%0,%3\n" \
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+ " stwcx. %1,%y2\n" \
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" bne- 1b" \
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- : "=&b" (__val), "=&r" (__tmp), "=m" (*mem) \
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- : "b" (mem), "r" (value), "m" (*mem) \
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+ : "=&b" (__val), "=&r" (__tmp), "+Z" (*mem) \
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+ : "r" (value) \
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: "cr0", "memory"); \
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__val; \
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})
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@@ -157,12 +157,12 @@
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#define __arch_atomic_increment_val_32(mem) \
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({ \
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__typeof (*(mem)) __val; \
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- __asm __volatile ("1: lwarx %0,0,%2\n" \
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+ __asm __volatile ("1: lwarx %0,%y1\n" \
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" addi %0,%0,1\n" \
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- " stwcx. %0,0,%2\n" \
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+ " stwcx. %0,%y1\n" \
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" bne- 1b" \
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- : "=&b" (__val), "=m" (*mem) \
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- : "b" (mem), "m" (*mem) \
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+ : "=&b" (__val), "+Z" (*mem) \
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+ : \
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: "cr0", "memory"); \
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__val; \
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})
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@@ -170,27 +170,27 @@
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#define __arch_atomic_decrement_val_32(mem) \
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({ \
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__typeof (*(mem)) __val; \
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- __asm __volatile ("1: lwarx %0,0,%2\n" \
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+ __asm __volatile ("1: lwarx %0,%y1\n" \
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" subi %0,%0,1\n" \
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- " stwcx. %0,0,%2\n" \
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+ " stwcx. %0,%y1\n" \
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" bne- 1b" \
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- : "=&b" (__val), "=m" (*mem) \
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- : "b" (mem), "m" (*mem) \
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+ : "=&b" (__val), "+Z" (*mem) \
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+ : \
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: "cr0", "memory"); \
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__val; \
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})
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#define __arch_atomic_decrement_if_positive_32(mem) \
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({ int __val, __tmp; \
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- __asm __volatile ("1: lwarx %0,0,%3\n" \
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+ __asm __volatile ("1: lwarx %0,%y2\n" \
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" cmpwi 0,%0,0\n" \
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" addi %1,%0,-1\n" \
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" ble 2f\n" \
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- " stwcx. %1,0,%3\n" \
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+ " stwcx. %1,%y2\n" \
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" bne- 1b\n" \
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"2: " __ARCH_ACQ_INSTR \
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- : "=&b" (__val), "=&r" (__tmp), "=m" (*mem) \
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- : "b" (mem), "m" (*mem) \
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+ : "=&b" (__val), "=&r" (__tmp), "+Z" (*mem) \
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+ : \
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: "cr0", "memory"); \
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__val; \
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})
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diff -durN glibc-2_9.orig/sysdeps/powerpc/powerpc32/bits/atomic.h glibc-2_9/sysdeps/powerpc/powerpc32/bits/atomic.h
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--- glibc-2_9.orig/sysdeps/powerpc/powerpc32/bits/atomic.h 2007-03-26 22:15:45.000000000 +0200
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+++ glibc-2_9/sysdeps/powerpc/powerpc32/bits/atomic.h 2009-02-02 22:01:40.000000000 +0100
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@@ -44,14 +44,14 @@
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({ \
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unsigned int __tmp; \
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__asm __volatile ( \
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- "1: lwarx %0,0,%1" MUTEX_HINT_ACQ "\n" \
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+ "1: lwarx %0,%y1" MUTEX_HINT_ACQ "\n" \
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" subf. %0,%2,%0\n" \
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" bne 2f\n" \
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- " stwcx. %3,0,%1\n" \
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+ " stwcx. %3,%y1\n" \
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" bne- 1b\n" \
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"2: " __ARCH_ACQ_INSTR \
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- : "=&r" (__tmp) \
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- : "b" (mem), "r" (oldval), "r" (newval) \
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+ : "=&r" (__tmp), "+Z" (*(mem)) \
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+ : "r" (oldval), "r" (newval) \
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: "cr0", "memory"); \
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__tmp != 0; \
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})
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@@ -60,14 +60,14 @@
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({ \
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unsigned int __tmp; \
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__asm __volatile (__ARCH_REL_INSTR "\n" \
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- "1: lwarx %0,0,%1" MUTEX_HINT_REL "\n" \
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+ "1: lwarx %0,%y1" MUTEX_HINT_REL "\n" \
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" subf. %0,%2,%0\n" \
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" bne 2f\n" \
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- " stwcx. %3,0,%1\n" \
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+ " stwcx. %3,%y1\n" \
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" bne- 1b\n" \
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"2: " \
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- : "=&r" (__tmp) \
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- : "b" (mem), "r" (oldval), "r" (newval) \
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+ : "=&r" (__tmp), "+Z" (*(mem)) \
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+ : "r" (oldval), "r" (newval) \
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: "cr0", "memory"); \
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__tmp != 0; \
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})
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diff -durN glibc-2_9.orig/sysdeps/powerpc/powerpc64/bits/atomic.h glibc-2_9/sysdeps/powerpc/powerpc64/bits/atomic.h
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--- glibc-2_9.orig/sysdeps/powerpc/powerpc64/bits/atomic.h 2007-03-26 22:16:03.000000000 +0200
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+++ glibc-2_9/sysdeps/powerpc/powerpc64/bits/atomic.h 2009-02-02 22:01:40.000000000 +0100
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@@ -44,14 +44,14 @@
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({ \
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unsigned int __tmp, __tmp2; \
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__asm __volatile (" clrldi %1,%1,32\n" \
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- "1: lwarx %0,0,%2" MUTEX_HINT_ACQ "\n" \
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+ "1: lwarx %0,%y2" MUTEX_HINT_ACQ "\n" \
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" subf. %0,%1,%0\n" \
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" bne 2f\n" \
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- " stwcx. %4,0,%2\n" \
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+ " stwcx. %4,%y2\n" \
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" bne- 1b\n" \
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"2: " __ARCH_ACQ_INSTR \
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- : "=&r" (__tmp), "=r" (__tmp2) \
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- : "b" (mem), "1" (oldval), "r" (newval) \
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+ : "=&r" (__tmp), "=r" (__tmp2), "+Z" (*(mem)) \
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+ : "1" (oldval), "r" (newval) \
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: "cr0", "memory"); \
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__tmp != 0; \
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})
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@@ -61,14 +61,14 @@
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unsigned int __tmp, __tmp2; \
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__asm __volatile (__ARCH_REL_INSTR "\n" \
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" clrldi %1,%1,32\n" \
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- "1: lwarx %0,0,%2" MUTEX_HINT_REL "\n" \
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+ "1: lwarx %0,%y2" MUTEX_HINT_REL "\n" \
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" subf. %0,%1,%0\n" \
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" bne 2f\n" \
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- " stwcx. %4,0,%2\n" \
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+ " stwcx. %4,%y2\n" \
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" bne- 1b\n" \
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"2: " \
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- : "=&r" (__tmp), "=r" (__tmp2) \
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- : "b" (mem), "1" (oldval), "r" (newval) \
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+ : "=&r" (__tmp), "=r" (__tmp2), "+Z" (*(mem)) \
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+ : "1" (oldval), "r" (newval) \
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: "cr0", "memory"); \
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__tmp != 0; \
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})
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@@ -82,14 +82,14 @@
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({ \
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unsigned long __tmp; \
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__asm __volatile ( \
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- "1: ldarx %0,0,%1" MUTEX_HINT_ACQ "\n" \
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+ "1: ldarx %0,%y1" MUTEX_HINT_ACQ "\n" \
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" subf. %0,%2,%0\n" \
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" bne 2f\n" \
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- " stdcx. %3,0,%1\n" \
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+ " stdcx. %3,%y1\n" \
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" bne- 1b\n" \
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"2: " __ARCH_ACQ_INSTR \
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- : "=&r" (__tmp) \
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- : "b" (mem), "r" (oldval), "r" (newval) \
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+ : "=&r" (__tmp), "+Z" (*(mem)) \
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+ : "r" (oldval), "r" (newval) \
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: "cr0", "memory"); \
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__tmp != 0; \
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})
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@@ -98,14 +98,14 @@
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({ \
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unsigned long __tmp; \
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__asm __volatile (__ARCH_REL_INSTR "\n" \
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- "1: ldarx %0,0,%2" MUTEX_HINT_REL "\n" \
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+ "1: ldarx %0,%y1" MUTEX_HINT_REL "\n" \
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" subf. %0,%2,%0\n" \
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" bne 2f\n" \
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- " stdcx. %3,0,%1\n" \
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+ " stdcx. %3,%y1\n" \
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" bne- 1b\n" \
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"2: " \
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- : "=&r" (__tmp) \
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- : "b" (mem), "r" (oldval), "r" (newval) \
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+ : "=&r" (__tmp), "+Z" (*(mem)) \
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+ : "r" (oldval), "r" (newval) \
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: "cr0", "memory"); \
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__tmp != 0; \
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})
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@@ -115,14 +115,14 @@
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__typeof (*(mem)) __tmp; \
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__typeof (mem) __memp = (mem); \
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__asm __volatile ( \
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- "1: ldarx %0,0,%1" MUTEX_HINT_ACQ "\n" \
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+ "1: ldarx %0,%y1" MUTEX_HINT_ACQ "\n" \
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" cmpd %0,%2\n" \
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" bne 2f\n" \
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- " stdcx. %3,0,%1\n" \
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+ " stdcx. %3,%y1\n" \
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" bne- 1b\n" \
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"2: " __ARCH_ACQ_INSTR \
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- : "=&r" (__tmp) \
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- : "b" (__memp), "r" (oldval), "r" (newval) \
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+ : "=&r" (__tmp), "+Z" (*__memp) \
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+ : "r" (oldval), "r" (newval) \
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: "cr0", "memory"); \
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__tmp; \
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})
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@@ -132,14 +132,14 @@
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__typeof (*(mem)) __tmp; \
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__typeof (mem) __memp = (mem); \
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__asm __volatile (__ARCH_REL_INSTR "\n" \
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- "1: ldarx %0,0,%1" MUTEX_HINT_REL "\n" \
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+ "1: ldarx %0,%y1" MUTEX_HINT_REL "\n" \
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" cmpd %0,%2\n" \
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" bne 2f\n" \
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- " stdcx. %3,0,%1\n" \
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+ " stdcx. %3,%y1\n" \
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" bne- 1b\n" \
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"2: " \
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- : "=&r" (__tmp) \
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- : "b" (__memp), "r" (oldval), "r" (newval) \
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+ : "=&r" (__tmp), "+Z" (*__memp) \
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+ : "r" (oldval), "r" (newval) \
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: "cr0", "memory"); \
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__tmp; \
|
|
})
|
|
@@ -148,12 +148,12 @@
|
|
({ \
|
|
__typeof (*mem) __val; \
|
|
__asm __volatile (__ARCH_REL_INSTR "\n" \
|
|
- "1: ldarx %0,0,%2" MUTEX_HINT_ACQ "\n" \
|
|
- " stdcx. %3,0,%2\n" \
|
|
+ "1: ldarx %0,%y1" MUTEX_HINT_ACQ "\n" \
|
|
+ " stdcx. %2,%y1\n" \
|
|
" bne- 1b\n" \
|
|
" " __ARCH_ACQ_INSTR \
|
|
- : "=&r" (__val), "=m" (*mem) \
|
|
- : "b" (mem), "r" (value), "m" (*mem) \
|
|
+ : "=&r" (__val), "+Z" (*(mem)) \
|
|
+ : "r" (value) \
|
|
: "cr0", "memory"); \
|
|
__val; \
|
|
})
|
|
@@ -162,11 +162,11 @@
|
|
({ \
|
|
__typeof (*mem) __val; \
|
|
__asm __volatile (__ARCH_REL_INSTR "\n" \
|
|
- "1: ldarx %0,0,%2" MUTEX_HINT_REL "\n" \
|
|
- " stdcx. %3,0,%2\n" \
|
|
+ "1: ldarx %0,%y1" MUTEX_HINT_REL "\n" \
|
|
+ " stdcx. %2,%y1\n" \
|
|
" bne- 1b" \
|
|
- : "=&r" (__val), "=m" (*mem) \
|
|
- : "b" (mem), "r" (value), "m" (*mem) \
|
|
+ : "=&r" (__val), "+Z" (*(mem)) \
|
|
+ : "r" (value) \
|
|
: "cr0", "memory"); \
|
|
__val; \
|
|
})
|
|
@@ -174,12 +174,12 @@
|
|
#define __arch_atomic_exchange_and_add_64(mem, value) \
|
|
({ \
|
|
__typeof (*mem) __val, __tmp; \
|
|
- __asm __volatile ("1: ldarx %0,0,%3\n" \
|
|
- " add %1,%0,%4\n" \
|
|
- " stdcx. %1,0,%3\n" \
|
|
+ __asm __volatile ("1: ldarx %0,%y2\n" \
|
|
+ " add %1,%0,%3\n" \
|
|
+ " stdcx. %1,%y2\n" \
|
|
" bne- 1b" \
|
|
- : "=&b" (__val), "=&r" (__tmp), "=m" (*mem) \
|
|
- : "b" (mem), "r" (value), "m" (*mem) \
|
|
+ : "=&b" (__val), "=&r" (__tmp), "+Z" (*(mem)) \
|
|
+ : "r" (value) \
|
|
: "cr0", "memory"); \
|
|
__val; \
|
|
})
|
|
@@ -187,12 +187,12 @@
|
|
#define __arch_atomic_increment_val_64(mem) \
|
|
({ \
|
|
__typeof (*(mem)) __val; \
|
|
- __asm __volatile ("1: ldarx %0,0,%2\n" \
|
|
+ __asm __volatile ("1: ldarx %0,%y1\n" \
|
|
" addi %0,%0,1\n" \
|
|
- " stdcx. %0,0,%2\n" \
|
|
+ " stdcx. %0,%y1\n" \
|
|
" bne- 1b" \
|
|
- : "=&b" (__val), "=m" (*mem) \
|
|
- : "b" (mem), "m" (*mem) \
|
|
+ : "=&b" (__val), "+Z" (*(mem)) \
|
|
+ : \
|
|
: "cr0", "memory"); \
|
|
__val; \
|
|
})
|
|
@@ -200,27 +200,27 @@
|
|
#define __arch_atomic_decrement_val_64(mem) \
|
|
({ \
|
|
__typeof (*(mem)) __val; \
|
|
- __asm __volatile ("1: ldarx %0,0,%2\n" \
|
|
+ __asm __volatile ("1: ldarx %0,%y1\n" \
|
|
" subi %0,%0,1\n" \
|
|
- " stdcx. %0,0,%2\n" \
|
|
+ " stdcx. %0,%y1\n" \
|
|
" bne- 1b" \
|
|
- : "=&b" (__val), "=m" (*mem) \
|
|
- : "b" (mem), "m" (*mem) \
|
|
+ : "=&b" (__val), "+Z" (*(mem)) \
|
|
+ : \
|
|
: "cr0", "memory"); \
|
|
__val; \
|
|
})
|
|
|
|
#define __arch_atomic_decrement_if_positive_64(mem) \
|
|
({ int __val, __tmp; \
|
|
- __asm __volatile ("1: ldarx %0,0,%3\n" \
|
|
+ __asm __volatile ("1: ldarx %0,%y2\n" \
|
|
" cmpdi 0,%0,0\n" \
|
|
" addi %1,%0,-1\n" \
|
|
" ble 2f\n" \
|
|
- " stdcx. %1,0,%3\n" \
|
|
+ " stdcx. %1,%y2\n" \
|
|
" bne- 1b\n" \
|
|
"2: " __ARCH_ACQ_INSTR \
|
|
- : "=&b" (__val), "=&r" (__tmp), "=m" (*mem) \
|
|
- : "b" (mem), "m" (*mem) \
|
|
+ : "=&b" (__val), "=&r" (__tmp), "+Z" (*(mem)) \
|
|
+ : \
|
|
: "cr0", "memory"); \
|
|
__val; \
|
|
})
|