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c175b21ce4
Bring in the fixes for GCC 7 through 13. https://rtx.meta.security/mitigation/2023/09/12/CVE-2023-4039.html https://developer.arm.com/Arm%20Security%20Center/GCC%20Stack%20Protector%20Vulnerability%20AArch64 Signed-off-by: Chris Packham <judge.packham@gmail.com>
255 lines
8.9 KiB
Diff
255 lines
8.9 KiB
Diff
From 12517baf6c88447e3bda3a459ac4c29d61f84e6c Mon Sep 17 00:00:00 2001
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From: Richard Sandiford <richard.sandiford@arm.com>
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Date: Tue, 27 Jun 2023 15:12:55 +0100
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Subject: [PATCH 28/30] aarch64: Put LR save probe in first 16 bytes
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-fstack-clash-protection uses the save of LR as a probe for the next
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allocation. The next allocation could be:
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* another part of the static frame, e.g. when allocating SVE save slots
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or outgoing arguments
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* an alloca in the same function
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* an allocation made by a callee function
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However, when -fomit-frame-pointer is used, the LR save slot is placed
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above the other GPR save slots. It could therefore be up to 80 bytes
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above the base of the GPR save area (which is also the hard fp address).
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aarch64_allocate_and_probe_stack_space took this into account when
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deciding how much subsequent space could be allocated without needing
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a probe. However, it interacted badly with:
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/* If doing a small final adjustment, we always probe at offset 0.
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This is done to avoid issues when LR is not at position 0 or when
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the final adjustment is smaller than the probing offset. */
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else if (final_adjustment_p && rounded_size == 0)
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residual_probe_offset = 0;
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which forces any allocation that is smaller than the guard page size
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to be probed at offset 0 rather than the usual offset 1024. It was
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therefore possible to construct cases in which we had:
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* a probe using LR at SP + 80 bytes (or some other value >= 16)
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* an allocation of the guard page size - 16 bytes
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* a probe at SP + 0
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which allocates guard page size + 64 consecutive unprobed bytes.
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This patch requires the LR probe to be in the first 16 bytes of the
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save area when stack clash protection is active. Doing it
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unconditionally would cause code-quality regressions.
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gcc/
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* config/aarch64/aarch64.c (aarch64_layout_frame): Ensure that
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the LR save slot is in the first 16 bytes of the register save area.
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(aarch64_allocate_and_probe_stack_space): Remove workaround for
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when LR was not in the first 16 bytes.
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gcc/testsuite/
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* gcc.target/aarch64/stack-check-prologue-18.c: New test.
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---
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gcc/config/aarch64/aarch64.c | 50 +++++----
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.../aarch64/stack-check-prologue-18.c | 100 ++++++++++++++++++
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2 files changed, 127 insertions(+), 23 deletions(-)
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create mode 100644 gcc/testsuite/gcc.target/aarch64/stack-check-prologue-18.c
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diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
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index 4c9e11cd7cff..1e8467fdd03f 100644
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--- a/gcc/config/aarch64/aarch64.c
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+++ b/gcc/config/aarch64/aarch64.c
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@@ -4686,15 +4686,31 @@ aarch64_layout_frame (void)
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cfun->machine->frame.bytes_below_hard_fp = crtl->outgoing_args_size;
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+#define ALLOCATE_GPR_SLOT(REGNO) \
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+ do \
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+ { \
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+ cfun->machine->frame.reg_offset[REGNO] = offset; \
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+ if (cfun->machine->frame.wb_candidate1 == INVALID_REGNUM) \
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+ cfun->machine->frame.wb_candidate1 = (REGNO); \
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+ else if (cfun->machine->frame.wb_candidate2 == INVALID_REGNUM) \
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+ cfun->machine->frame.wb_candidate2 = (REGNO); \
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+ offset += UNITS_PER_WORD; \
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+ } \
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+ while (0)
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+
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if (cfun->machine->frame.emit_frame_chain)
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{
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/* FP and LR are placed in the linkage record. */
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- cfun->machine->frame.reg_offset[R29_REGNUM] = 0;
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- cfun->machine->frame.wb_candidate1 = R29_REGNUM;
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- cfun->machine->frame.reg_offset[R30_REGNUM] = UNITS_PER_WORD;
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- cfun->machine->frame.wb_candidate2 = R30_REGNUM;
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- offset = 2 * UNITS_PER_WORD;
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+ ALLOCATE_GPR_SLOT (R29_REGNUM);
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+ ALLOCATE_GPR_SLOT (R30_REGNUM);
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}
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+ else if (flag_stack_clash_protection
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+ && cfun->machine->frame.reg_offset[R30_REGNUM] == SLOT_REQUIRED)
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+ /* Put the LR save slot first, since it makes a good choice of probe
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+ for stack clash purposes. The idea is that the link register usually
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+ has to be saved before a call anyway, and so we lose little by
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+ stopping it from being individually shrink-wrapped. */
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+ ALLOCATE_GPR_SLOT (R30_REGNUM);
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/* With stack-clash, LR must be saved in non-leaf functions. */
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gcc_assert (crtl->is_leaf
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@@ -4704,14 +4720,9 @@ aarch64_layout_frame (void)
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/* Now assign stack slots for them. */
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for (regno = R0_REGNUM; regno <= R30_REGNUM; regno++)
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if (cfun->machine->frame.reg_offset[regno] == SLOT_REQUIRED)
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- {
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- cfun->machine->frame.reg_offset[regno] = offset;
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- if (cfun->machine->frame.wb_candidate1 == INVALID_REGNUM)
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- cfun->machine->frame.wb_candidate1 = regno;
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- else if (cfun->machine->frame.wb_candidate2 == INVALID_REGNUM)
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- cfun->machine->frame.wb_candidate2 = regno;
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- offset += UNITS_PER_WORD;
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- }
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+ ALLOCATE_GPR_SLOT (regno);
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+
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+#undef ALLOCATE_GPR_SLOT
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HOST_WIDE_INT max_int_offset = offset;
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offset = ROUND_UP (offset, STACK_BOUNDARY / BITS_PER_UNIT);
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@@ -5508,16 +5519,9 @@ aarch64_allocate_and_probe_stack_space (rtx temp1, rtx temp2,
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HOST_WIDE_INT guard_used_by_caller = STACK_CLASH_CALLER_GUARD;
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HOST_WIDE_INT byte_sp_alignment = STACK_BOUNDARY / BITS_PER_UNIT;
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gcc_assert (multiple_p (poly_size, byte_sp_alignment));
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- /* When doing the final adjustment for the outgoing argument size we can't
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- assume that LR was saved at position 0. So subtract it's offset from the
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- ABI safe buffer so that we don't accidentally allow an adjustment that
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- would result in an allocation larger than the ABI buffer without
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- probing. */
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HOST_WIDE_INT min_probe_threshold
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= final_adjustment_p
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- ? (guard_used_by_caller
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- + byte_sp_alignment
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- - cfun->machine->frame.reg_offset[LR_REGNUM])
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+ ? guard_used_by_caller + byte_sp_alignment
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: guard_size - guard_used_by_caller;
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poly_int64 frame_size = cfun->machine->frame.frame_size;
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@@ -5697,8 +5701,8 @@ aarch64_allocate_and_probe_stack_space (rtx temp1, rtx temp2,
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if (final_adjustment_p && rounded_size != 0)
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min_probe_threshold = 0;
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/* If doing a small final adjustment, we always probe at offset 0.
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- This is done to avoid issues when LR is not at position 0 or when
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- the final adjustment is smaller than the probing offset. */
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+ This is done to avoid issues when the final adjustment is smaller
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+ than the probing offset. */
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else if (final_adjustment_p && rounded_size == 0)
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residual_probe_offset = 0;
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diff --git a/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-18.c b/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-18.c
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new file mode 100644
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index 000000000000..82447d20fff5
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--- /dev/null
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+++ b/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-18.c
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@@ -0,0 +1,100 @@
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+/* { dg-options "-O2 -fstack-clash-protection -fomit-frame-pointer --param stack-clash-protection-guard-size=12" } */
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+/* { dg-final { check-function-bodies "**" "" } } */
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+
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+void f(int, ...);
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+void g();
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+
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+/*
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+** test1:
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+** ...
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+** str x30, \[sp\]
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+** sub sp, sp, #4064
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+** str xzr, \[sp\]
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+** cbnz w0, .*
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+** bl g
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+** ...
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+** str x26, \[sp, #?4128\]
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+** ...
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+*/
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+int test1(int z) {
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+ __uint128_t x = 0;
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+ int y[0x400];
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+ if (z)
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+ {
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+ asm volatile ("" :::
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+ "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26");
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+ f(0, 0, 0, 0, 0, 0, 0, &y,
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+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
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+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
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+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
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+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
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+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
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+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
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+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
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+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
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+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
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+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
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+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
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+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
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+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
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+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
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+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
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+ x, x, x, x, x, x, x, x, x, x, x, x, x, x);
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+ }
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+ g();
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+ return 1;
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+}
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+
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+/*
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+** test2:
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+** ...
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+** str x30, \[sp\]
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+** sub sp, sp, #1040
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+** str xzr, \[sp\]
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+** cbnz w0, .*
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+** bl g
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+** ...
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+*/
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+int test2(int z) {
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+ __uint128_t x = 0;
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+ int y[0x400];
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+ if (z)
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+ {
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+ asm volatile ("" :::
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+ "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26");
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+ f(0, 0, 0, 0, 0, 0, 0, &y,
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+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
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+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
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+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
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+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
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+ x);
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+ }
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+ g();
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+ return 1;
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+}
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+
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+/*
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+** test3:
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+** ...
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+** str x30, \[sp\]
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+** sub sp, sp, #1024
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+** cbnz w0, .*
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+** bl g
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+** ...
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+*/
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+int test3(int z) {
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+ __uint128_t x = 0;
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+ int y[0x400];
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+ if (z)
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+ {
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+ asm volatile ("" :::
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+ "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26");
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+ f(0, 0, 0, 0, 0, 0, 0, &y,
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+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
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+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
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+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x,
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+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x);
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+ }
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+ g();
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+ return 1;
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+}
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--
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2.42.0
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