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71074b7f82
This configuration has been tested on an Atmel sama5d3 board. It is a Cortex-A5 without neon and the floating point unit is a vfpv4-d16. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
35 lines
785 B
Plaintext
35 lines
785 B
Plaintext
CT_EXPERIMENTAL=y
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CT_LOCAL_TARBALLS_DIR="${HOME}/src"
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CT_SAVE_TARBALLS=y
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CT_LOG_EXTRA=y
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CT_ARCH_ARCH="armv7-a"
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CT_ARCH_CPU="cortex-a5"
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CT_ARCH_TUNE="cortex-a5"
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CT_ARCH_FPU="vfpv4-d16"
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CT_ARCH_FLOAT_HW=y
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CT_ARCH_arm=y
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CT_ARCH_ARM_TUPLE_USE_EABIHF=y
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CT_KERNEL_linux=y
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CT_KERNEL_V_3_10=y
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CT_BINUTILS_V_2_24=y
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CT_BINUTILS_FOR_TARGET=y
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CT_LIBC_uClibc=y
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CT_LIBC_UCLIBC_V_0_9_33_2=y
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CT_LIBC_UCLIBC_CONFIG_FILE="${CT_LIB_DIR}/samples/arm-cortexa5-linux-uclibcgnueabihf/${CT_LIBC}-${CT_LIBC_VERSION}.config"
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CT_LIBC_UCLIBC_WCHAR=y
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CT_CC_V_4_8_2=y
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CT_CC_LANG_CXX=y
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CT_DEBUG_dmalloc=y
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CT_DEBUG_duma=y
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CT_DEBUG_gdb=y
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CT_GDB_CROSS_STATIC=y
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CT_GDB_NATIVE=y
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CT_GDB_V_7_7=y
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CT_DEBUG_ltrace=y
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CT_DEBUG_strace=y
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CT_STRACE_V_4_8=y
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CT_GMP_V_5_1_3=y
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CT_MPFR_V_3_1_2=y
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CT_ISL_V_0_12_2=y
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CT_CLOOG_V_0_18_1=y
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