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You might just say: 'Yeah! crosstool-NG's got its own repo!". Unfortunately, that's because the previous repo got damaged beyond repair and I had no backup. That means I'm putting backups in place in the afternoon. That also means we've lost history... :-(
247 lines
7.5 KiB
Diff
247 lines
7.5 KiB
Diff
Date: Fri, 06 Feb 2004 12:35:58 +0900
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From: SUGIOKA Toshinobu <sugioka@itonet.co.jp>
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Subject: [linux-sh:03150] Re: gcc 3.3 optimisation problem
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To: linux-sh@m17n.org
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Message-Id: <4.2.0.58.J.20040206122503.04fe3058@router.itonet.co.jp>
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List-Help: <mailto:linux-sh-ctl@m17n.org?body=help>
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List-Id: linux-sh.m17n.org
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At 19:40 03/12/01 +0000, Stuart Menefy <stuart.menefy@st.com> wrote:
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>On Sat, 29 Nov 2003 20:19:08 +0900 kkojima@rr.iij4u.or.jp wrote:
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>
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>> Dan Kegel <dank@kegel.com> wrote:
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>> > Stuart Menefy wrote:
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>> >> I've just been trying to put together a gcc 3.3.2 based toolchain, and
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>> >> appear to be hitting a gcc optimisation bug. I was just wondering if
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>> >> anyone else had seen anything similar.
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>> >>
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>> >> The problem is seen when building the kernel, in the function
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>> >> root_nfs_parse_addr(). I've extracted this into a small stand alone
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>> >> program which demonstrates the problem.
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>> >
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>> > Excellent work. I haven't seen anything like this (doesn't mean much)
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>> > and the sh-specific optimization bugs in the gcc bug database don't look
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>> > similar. I think you should submit this as a bug report at
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>> > http://gcc.gnu.org/bugzilla/
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>> > It would be good if you could make your test case call abort() if
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>> > the problem is present, so the test case can be automated.
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>>
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>> Indeed. It'd be very nice to create a gcc PR for this issue.
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>
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>OK, I've done that. PR 13260.
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PR 13260 was fixed by amylaar@gcc.gnu.org at 2003-12-04 20:10:29 on mainline(gcc-3.4).
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I have back-ported that patch to gcc-3.3.3 and seems fine for me.
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* sh-protos.h (sh_expand_t_scc): Declare.
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* sh.h (PREDICATE_CODES): Add cmpsi_operand.
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* sh.c (cmpsi_operand, sh_expand_t_scc): New functions.
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* sh.md (cmpsi): Use cmpsi_operand. If T_REG is compared to
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something that is not a CONST_INT, copy it into a pseudo register.
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(subc): Fix description of new T value.
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(slt, sgt, sge, sgtu): Don't clobber T after rtl generation is over.
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(sltu, sleu, sgeu): Likewise.
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(seq, sne): Likewise. Use sh_expand_t_scc.
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diff -ru gcc-3.3-20040126-1/gcc/config/sh/sh-protos.h gcc-3.3-20040126/gcc/config/sh/sh-protos.h
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--- gcc-3.3-20040126-1/gcc/config/sh/sh-protos.h Tue Jan 13 02:03:24 2004
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+++ gcc-3.3-20040126/gcc/config/sh/sh-protos.h Fri Jan 30 17:54:04 2004
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@@ -102,6 +102,7 @@
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extern int sh_can_redirect_branch PARAMS ((rtx, rtx));
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extern void sh_expand_unop_v2sf PARAMS ((enum rtx_code, rtx, rtx));
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extern void sh_expand_binop_v2sf PARAMS ((enum rtx_code, rtx, rtx, rtx));
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+extern int sh_expand_t_scc (enum rtx_code code, rtx target);
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#ifdef TREE_CODE
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extern void sh_va_start PARAMS ((tree, rtx));
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extern rtx sh_va_arg PARAMS ((tree, tree));
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diff -ru gcc-3.3-20040126-1/gcc/config/sh/sh.c gcc-3.3-20040126/gcc/config/sh/sh.c
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--- gcc-3.3-20040126-1/gcc/config/sh/sh.c Thu Jan 15 03:11:36 2004
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+++ gcc-3.3-20040126/gcc/config/sh/sh.c Fri Jan 30 17:53:58 2004
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@@ -7870,6 +7870,15 @@
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return register_operand (op, mode);
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}
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+int
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+cmpsi_operand (rtx op, enum machine_mode mode)
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+{
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+ if (GET_CODE (op) == REG && REGNO (op) == T_REG
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+ && GET_MODE (op) == SImode)
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+ return 1;
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+ return arith_operand (op, mode);
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+}
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+
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/* INSN is an sfunc; return the rtx that describes the address used. */
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static rtx
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extract_sfunc_addr (rtx insn)
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@@ -7917,4 +7926,33 @@
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abort ();
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}
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+int
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+sh_expand_t_scc (enum rtx_code code, rtx target)
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+{
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+ rtx result = target;
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+ HOST_WIDE_INT val;
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+
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+ if (GET_CODE (sh_compare_op0) != REG || REGNO (sh_compare_op0) != T_REG
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+ || GET_CODE (sh_compare_op1) != CONST_INT)
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+ return 0;
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+ if (GET_CODE (result) != REG)
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+ result = gen_reg_rtx (SImode);
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+ val = INTVAL (sh_compare_op1);
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+ if ((code == EQ && val == 1) || (code == NE && val == 0))
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+ emit_insn (gen_movt (result));
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+ else if ((code == EQ && val == 0) || (code == NE && val == 1))
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+ {
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+ emit_insn (gen_rtx_CLOBBER (VOIDmode, result));
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+ emit_insn (gen_subc (result, result, result));
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+ emit_insn (gen_addsi3 (result, result, GEN_INT (1)));
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+ }
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+ else if (code == EQ || code == NE)
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+ emit_insn (gen_move_insn (result, GEN_INT (code == NE)));
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+ else
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+ return 0;
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+ if (result != target)
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+ emit_move_insn (target, result);
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+ return 1;
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+}
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+
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#include "gt-sh.h"
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diff -ru gcc-3.3-20040126-1/gcc/config/sh/sh.h gcc-3.3-20040126/gcc/config/sh/sh.h
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--- gcc-3.3-20040126-1/gcc/config/sh/sh.h Wed Apr 16 02:06:09 2003
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+++ gcc-3.3-20040126/gcc/config/sh/sh.h Fri Jan 30 17:53:51 2004
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@@ -3231,6 +3231,7 @@
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{"arith_reg_or_0_operand", {SUBREG, REG, CONST_INT, CONST_VECTOR}}, \
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{"binary_float_operator", {PLUS, MINUS, MULT, DIV}}, \
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{"binary_logical_operator", {AND, IOR, XOR}}, \
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+ {"cmpsi_operand", {SUBREG, REG, CONST_INT}}, \
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{"commutative_float_operator", {PLUS, MULT}}, \
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{"equality_comparison_operator", {EQ,NE}}, \
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{"extend_reg_operand", {SUBREG, REG, TRUNCATE}}, \
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diff -ru gcc-3.3-20040126-1/gcc/config/sh/sh.md gcc-3.3-20040126/gcc/config/sh/sh.md
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--- gcc-3.3-20040126-1/gcc/config/sh/sh.md Tue Jan 13 02:03:25 2004
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+++ gcc-3.3-20040126/gcc/config/sh/sh.md Fri Jan 30 17:54:20 2004
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@@ -685,11 +685,14 @@
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(define_expand "cmpsi"
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[(set (reg:SI T_REG)
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- (compare (match_operand:SI 0 "arith_operand" "")
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+ (compare (match_operand:SI 0 "cmpsi_operand" "")
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(match_operand:SI 1 "arith_operand" "")))]
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"TARGET_SH1"
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"
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{
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+ if (GET_CODE (operands[0]) == REG && REGNO (operands[0]) == T_REG
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+ && GET_CODE (operands[1]) != CONST_INT)
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+ operands[0] = copy_to_mode_reg (SImode, operands[0]);
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sh_compare_op0 = operands[0];
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sh_compare_op1 = operands[1];
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DONE;
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@@ -1147,7 +1150,9 @@
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(match_operand:SI 2 "arith_reg_operand" "r"))
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(reg:SI T_REG)))
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(set (reg:SI T_REG)
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- (gtu:SI (minus:SI (match_dup 1) (match_dup 2)) (match_dup 1)))]
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+ (gtu:SI (minus:SI (minus:SI (match_dup 1) (match_dup 2))
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+ (reg:SI T_REG))
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+ (match_dup 1)))]
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"TARGET_SH1"
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"subc %2,%0"
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[(set_attr "type" "arith")])
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@@ -7223,6 +7228,10 @@
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}
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DONE;
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}
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+ if (sh_expand_t_scc (EQ, operands[0]))
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+ DONE;
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+ if (! rtx_equal_function_value_matters)
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+ FAIL;
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operands[1] = prepare_scc_operands (EQ);
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}")
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@@ -7269,6 +7278,8 @@
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}
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DONE;
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}
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+ if (! rtx_equal_function_value_matters)
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+ FAIL;
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operands[1] = prepare_scc_operands (LT);
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}")
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@@ -7371,6 +7382,8 @@
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}
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DONE;
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}
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+ if (! rtx_equal_function_value_matters)
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+ FAIL;
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operands[1] = prepare_scc_operands (GT);
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}")
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@@ -7423,6 +7436,8 @@
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DONE;
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}
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+ if (! rtx_equal_function_value_matters)
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+ FAIL;
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if (GET_MODE_CLASS (GET_MODE (sh_compare_op0)) == MODE_FLOAT)
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{
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if (TARGET_IEEE)
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@@ -7462,6 +7477,8 @@
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sh_compare_op0, sh_compare_op1));
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DONE;
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}
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+ if (! rtx_equal_function_value_matters)
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+ FAIL;
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operands[1] = prepare_scc_operands (GTU);
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}")
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@@ -7486,6 +7503,8 @@
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sh_compare_op1, sh_compare_op0));
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DONE;
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}
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+ if (! rtx_equal_function_value_matters)
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+ FAIL;
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operands[1] = prepare_scc_operands (LTU);
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}")
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@@ -7515,6 +7534,8 @@
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DONE;
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}
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+ if (! rtx_equal_function_value_matters)
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+ FAIL;
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operands[1] = prepare_scc_operands (LEU);
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}")
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@@ -7545,6 +7566,8 @@
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DONE;
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}
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+ if (! rtx_equal_function_value_matters)
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+ FAIL;
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operands[1] = prepare_scc_operands (GEU);
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}")
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@@ -7592,8 +7615,12 @@
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DONE;
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}
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- operands[1] = prepare_scc_operands (EQ);
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- operands[2] = gen_reg_rtx (SImode);
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+ if (sh_expand_t_scc (NE, operands[0]))
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+ DONE;
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+ if (! rtx_equal_function_value_matters)
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+ FAIL;
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+ operands[1] = prepare_scc_operands (EQ);
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+ operands[2] = gen_reg_rtx (SImode);
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}")
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(define_expand "sunordered"
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----
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SUGIOKA Toshinobu
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