... parts of the config tuple. While here, remove parts that are
setting portions of the target tuple to a value that's already
the default.
Signed-off-by: Alexey Neyman <stilor@att.net>
To build uClibc correctly we need correct endianness selected in the
crosstool-NG. Xtensa cores may be little- or big-endian, but this
property is static. The toolchain knows the core endianness and doesn't
need options to select it.
Enable ARCH_SUPPORTS_BOTH_ENDIAN and select LE by default. Specify empty
CT_ARCH_ENDIAN_CFLAG so that -m{big,little}-endian don't get added to
the TARGET_CFLAGS, as it's not supported by gcc. Specify empty
CT_ARCH_ENDIAN_LDFLAG so that -EB/-EL don't get added to the
TARGET_LDFLAGS as they are ignored. Select big-endian in the example
xtensa-unknown-linux-uclibc configuration.
This fixes uClibc toolchain build for little-endian cores.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Since CUSTOM_LOCATION_ROOT_DIR was removed from config/global/paths.in
in commit c499ccb, xtensa should depend only on it's
ARCH_XTENSA_CUSTOM_OVERLAY_LOCATION.
Signed-off-by: Bryan Hundven <bryanhundven@gmail.com>
Reviewed-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
The Xtensa processor architecture is a configurable, extensible,
and synthesizable 32-bit RISC processor core. Processor and SOC vendors
can select from various processor options and even create customized
instructions in addition to a base ISA to tailor the processor for
a particular application.
Because of the configurability, the build process requires one additional
step for gcc, binutils, and gdb to update the default configuration.
These configurations are packed into an 'overlay' tar image, and are
simply untarred on top of the default configuration during the build.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
