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risc-v: Provide sample for picolibc-only toolchain

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This builds a multilib toolchain using picolibc. The default target
is rv32imac

Signed-off-by: Keith Packard <keithp@keithp.com>
This commit is contained in:
Keith Packard 2023-04-03 15:52:38 -07:00 committed by Chris Packham
parent 56dbe2ad30
commit 918c2a82c8
2 changed files with 19 additions and 0 deletions
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16
samples/riscv32-picolibc-elf/crosstool.config Normal file
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CT_CONFIG_VERSION="4"
CT_EXPERIMENTAL=y
CT_ARCH_RISCV=y
CT_MULTILIB=y
CT_ARCH_ARCH="rv32imac_zicsr_zifencei"
CT_ARCH_ABI="ilp32"
CT_TARGET_CFLAGS="-ftls-model=local-exec"
CT_TARGET_VENDOR="picolibc"
CC_CC_GCC_ENABLE_DEFAULT_PIE=n
CT_LIBC_PICOLIBC=y
CT_CC_GCC_CONFIG_TLS=y
CT_CC_LANG_CXX=y
CT_LIBC_PICOLIBC_DEFAULT_FLASH_ADDR="0x80000000"
CT_LIBC_PICOLIBC_DEFAULT_FLASH_SIZE="0x00200000"
CT_LIBC_PICOLIBC_DEFAULT_RAM_ADDR="0x80200000"
CT_LIBC_PICOLIBC_DEFAULT_RAM_SIZE="0x00200000"

3
samples/riscv32-picolibc-elf/reported.by Normal file
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reporter_name="Keith Packard"
reporter_url="http://keithp.com/"
reporter_comment="Based on arm-picolibc-eabi"